Apparatus and method for contact failure inspection in semiconductor devices
First Claim
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1. A method of inspecting at least a portion of a semiconductor wafer in which at least a portion of a semiconductor integrated circuit is formed, said method comprising:
- reading scanning electron microscope (SEM) image data for the portion of the semiconductor wafer, the image data for the portion of the semiconductor wafer including pixel data for a plurality of image pixels, the pixel data for each pixel including pixel intensity information for the pixel;
identifying image data related to a feature of the portion of the integrated circuit in the semiconductor wafer within the data for the portion of the semiconductor wafer;
computing an image pixel intensity profile for the feature, said computing an image intensity profile for the feature comprising performing a mesh analysis on pixel data for each of a plurality of pixels identified as being related to the feature, the intensity profile comprising a plurality of profile data entries, said performing, a mesh analysis comprising;
superimposing a coordinate system over an image of the portion of the semiconductor wafer;
at a plurality of locations along a first axis of the coordinate system, analyzing intensity values of pixels disposed along a second axis of the coordinate system; and
generating a profile data entry at each of the plurality of locations along the first axis by generating a combination of pixel intensity information for a plurality of the pixels disposed along the second axis;
computing a parameter related to the feature of the portion of the integrated circuit from the image intensity profile for the feature of the portion of the integrated circuit;
comparing the parameter to a range of acceptable values for the parameter; and
using the image pixel intensity profile, classifying the feature of the portion of the integrated circuit according to the comparison with the range of acceptable values for the parameter.
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Abstract
There is provided a contact failure inspection system and method for semiconductor devices and a method of manufacturing semiconductor devices. Using digitized values for electron signals detected using a scanning electron microscope, contacts can be inspected to identify failures such as non-open contact holes. The contact failure inspection is performed by comparing the electron signal value detected from a unit area including at least one contact hole with values representative of the electron signal corresponding to a normal contact.
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Citations
54 Claims
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1. A method of inspecting at least a portion of a semiconductor wafer in which at least a portion of a semiconductor integrated circuit is formed, said method comprising:
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reading scanning electron microscope (SEM) image data for the portion of the semiconductor wafer, the image data for the portion of the semiconductor wafer including pixel data for a plurality of image pixels, the pixel data for each pixel including pixel intensity information for the pixel;
identifying image data related to a feature of the portion of the integrated circuit in the semiconductor wafer within the data for the portion of the semiconductor wafer;
computing an image pixel intensity profile for the feature, said computing an image intensity profile for the feature comprising performing a mesh analysis on pixel data for each of a plurality of pixels identified as being related to the feature, the intensity profile comprising a plurality of profile data entries, said performing, a mesh analysis comprising;
superimposing a coordinate system over an image of the portion of the semiconductor wafer;
at a plurality of locations along a first axis of the coordinate system, analyzing intensity values of pixels disposed along a second axis of the coordinate system; and
generating a profile data entry at each of the plurality of locations along the first axis by generating a combination of pixel intensity information for a plurality of the pixels disposed along the second axis;
computing a parameter related to the feature of the portion of the integrated circuit from the image intensity profile for the feature of the portion of the integrated circuit;
comparing the parameter to a range of acceptable values for the parameter; and
using the image pixel intensity profile, classifying the feature of the portion of the integrated circuit according to the comparison with the range of acceptable values for the parameter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
computing a second parameter related to the feature of the portion of the integrated circuit from the image data for the feature of the portion of the integrated circuit;
comparing the second parameter to a range of acceptable values for the second parameter; and
classifying the feature of the portion of the integrated circuit according to the comparison with the range of acceptable values for the second parameter.
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11. The method of claim 10 wherein the second parameter comprises a dimension of the feature of the portion of the integrated circuit.
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12. The method of claim 10 wherein the second parameter comprises a number of SEM image data pixels associated with the feature of the portion of the integrated circuit.
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13. The method of claim 10 wherein the second parameter comprises an average intensity of pixels associated with the feature of the portion of the integrated circuit.
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14. The method of claim 10 wherein the feature of the portion of the integrated circuit can be classified as acceptable only if the first parameter is within the range of acceptable values for the first parameter and the second parameter is within the range of acceptable values for the second parameter.
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15. The method of claim 1 wherein said analyzing comprises summing the intensity values of the pixels disposed along the second axis.
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16. The method of claim 15 wherein said analyzing further comprises detecting a change in summed intensity values for a plurality of locations along the first axis to detect the feature of the portion of the integrated circuit.
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17. The method of claim 1 wherein said analyzing comprises averaging the intensity values of the pixels disposed along the second axis.
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18. The method of claim 17 wherein performing the mesh analysis comprises detecting a change in averaged intensity values for a plurality of locations along the first axis to detect the feature of the portion of the integrated circuit.
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19. The method of claim 1 wherein performing the mesh analysis comprises determining a size of the feature of the portion of the integrated circuit.
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20. The method of claim 1 wherein performing the mesh analysis comprises determining a location of the feature of the portion of the integrated circuit.
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21. The method of claim 1 wherein performing the mesh analysis comprises identifying a pattern of a plurality of the features of a plurality of portions of the integrated circuit.
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22. The method of claim 21 wherein the pattern is a periodic pattern.
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23. The method of claim 1 wherein the coordinate system is a rectangular coordinate system.
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24. The method of claim 1 wherein the coordinate system is a triangular coordinate system.
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25. The method of claim 1 wherein the coordinate system is a trapezoidal coordinate system.
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26. The method of claim 1 wherein the SEM image data are in the form of digitized pixel grey scale values.
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27. The method of claim 1 wherein the SEM image data are in the form of digitized color coded pixel values.
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28. An apparatus for inspecting at least a portion of a semiconductor wafer in which at least a portion of a semiconductor integrated circuit is formed, said apparatus comprising:
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means for reading scanning electron microscope (SEM) image data for the portion of the semiconductor wafer, the image data for the portion of the semiconductor wafer including pixel data for a plurality of image pixels, the pixel data for each pixel including pixel intensity information for the pixel;
means for identifying image data related to a feature of the portion of the integrated circuit in the semiconductor wafer within the data for the portion of the semiconductor wafer;
means for computing an image pixel intensity profile for the feature , said means for computing an image pixel intensity profile comprising means for performing a mesh analysis on pixel data for each of a plurality of pixels identified as being related to the feature, the intensity profile comprising a plurality of profile data entries, said means for performing a mesh analysis (i) superimposing a coordinate system over an image of the portion of the semiconductor wafer, (ii) at a plurality of locations along a first axis of the coordinate system, analyzing intensity values of pixels disposed along a second axis of the coordinate system, and (iii) generating a profile data entry at each of the plurality of locations along the first axis by generating a combination of pixel intensity information for a plurality of the pixels disposed along the second axis;
means for computing a parameter related to the feature of the portion of the integrated circuit from the image intensity profile for the feature of the portion of the integrated circuit;
means for comparing the parameter to a range of acceptable values for the parameter; and
means for classifying the feature of the portion of the integrated circuit, using the image pixel intensity profile for the feature of the portion of the integrated circuit, according to the comparison with the range of acceptable values for the parameter. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 47, 48, 49, 50, 51, 52, 53, 54)
means for computing a second parameter related to the feature of the portion of the integrated circuit from the image data for the feature of the portion of the integrated circuit;
means for comparing the second parameter to a range of acceptable values for the second parameter; and
means for classifying the feature of the portion of the integrated circuit according to the comparison with the range of acceptable values for the second parameter.
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38. The apparatus of claim 37 wherein the second parameter comprises a dimension of the feature of the portion of the integrated circuit.
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39. The apparatus of claim 37 wherein the second parameter comprises a number of SEM image data pixels associated with the feature of the portion of the integrated circuit.
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40. The apparatus of claim 37 wherein the second parameter comprises an average intensity of pixels associated with the feature of the portion of the integrated circuit.
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41. The apparatus of claim 37 wherein the feature of the portion of the portion of the integrated circuit can be classified as acceptable only if the first parameter is within the range of acceptable values for the first parameter and the second parameter is within the range of acceptable values for the second parameter.
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42. The apparatus of claim 28 wherein said means for analyzing comprises means for summing the intensity values of the pixels disposed along the second axis.
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43. The apparatus of claim 42 wherein said means for analyzing further comprises means for detecting a change in summed intensity values for a plurality of locations along the first axis to detect the feature of the portion of the integrated circuit.
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44. The apparatus of claim 28 wherein said means for analyzing comprises means for averaging the intensity values of the pixels disposed along the second axis.
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45. The apparatus of claim 44 wherein said means for performing a mesh analysis comprises means for detecting a change in averaged intensity values for a plurality of locations along the first axis to detect the feature of the portion of the integrated circuit.
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47. The apparatus of claim 28 wherein said means for performing a mesh analysis comprises means for determining a location of the feature of the portion of the integrated circuit.
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48. The apparatus of claim 28 wherein said means for performing a mesh analysis comprises means for identifying a pattern of a plurality of the features of a plurality of portions of the integrated circuit.
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49. The apparatus of claim 28 wherein the pattern is a periodic pattern.
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50. The apparatus of claim 28 wherein the coordinate system is a rectangular coordinate system.
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51. The apparatus of claim 28 wherein the coordinate system is a triangular coordinate system.
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52. The apparatus of claim 28 wherein the coordinate system is a trapezoidal coordinate system.
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53. The apparatus of claim 28 wherein the SEM image data are in the form of digitized pixel grey scale values.
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54. The apparatus of claim 28 wherein the SEM image data are in the form of digitized color coded pixel values.
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46. The apparatus of clam 28 wherein said means for performing a mesh analysis comprises means for determining a size of the feature of the portion of the integrated circuit.
Specification