Method for symmetrizing asymmetric faults

• US 6,369,543 B1
• Filed: 11/24/2000
• Issued: 04/09/2002
• Est. Priority Date: 01/28/1998
• Status: Expired due to Fees

• Current Assignee: Alstom Belgium SA (Alstom SA)
• Original Assignee: Alstom Belgium SA (Alstom SA)
• Inventors: Bodson, Jean-Marie, Masselus, Jean-Emmanuel, Colasse, Alexis
• Primary Examiner(s): Masih, Karen
• Application Number:
  US09/601,372
• Time in Patent Office: 501 Days
• Field of Search: 318/803, 318/801, 318/798, 318/800, 318/802, 318/805, 318/700, 363/98, 363/97, 361/18
• US Class Current: 318/700
• CPC Class Codes: H02H 7/1225 responsive to internal faults, e.g. shoot-through avoiding shoot-through H02M1/38
• CPC Class Codes: H02P 29/032 Preventing damage to the motor, e.g. setting individual current limits for different drive conditions

Abstract

The present invention concerns a method for symmetrizing asymmetric faults occurring within a pull chain comprising a synchronous or asynchronous motor controlled by a two-level or multi-level inverter consisting of static switches using semiconductors such as IGBT or bipolar transistors. The invention comprises detecting whether the fault connects or may connect a motor phase with the top point or the bottom point of the inverter power supply, and short-circuiting only the half of the inverter affected by the fault on the basis of the detection.

Claims

1. In a traction chain comprising a motor driven by an inverter and associated power supply, a method of symmetrizing an asymmetric defect comprising

detecting a defective component in said inverter which may result in the connection of a motor phase to a top point or a bottom point of said power supply;

in response to said detecting, short circuiting only that half of the inverter comprising said defective component.

2. The method of claim 1, wherein said short circuiting creates an inverter output short circuit without creating an inverter input short circuit.

3. The method of claim 1, wherein said short circuiting creates a short circuit between all phases of said motor.

4. The method of claim 1, wherein said detecting comprises detecting desaturation of an IGBT.

5. The method of claim 4, wherein said detecting comprises detecting active peak limiting of an IGBT.

6. The method of claim 1, wherein said inverter comprises a two-level inverter.

7. The method of claim 1, wherein said inverter comprises a three-level inverter.