Host-independent monolithic integrated circuit for RF downconversion and digital signal processing of GPS signals

• US 6,369,753 B1
• Filed: 08/22/2000
• Issued: 04/09/2002
• Est. Priority Date: 08/22/2000
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Schucker, Douglas W., King, Thomas Michael, Ogren, Jeffrey J.
• Primary Examiner(s): Zanelli, Michael J.
• Application Number:
  US09/644,033
• Time in Patent Office: 595 Days
• Field of Search: 342/357.12, 701/213
• US Class Current: 342/357.75
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/36 relating to the receiver frond end

Abstract

A global position system (GPS) receiver for a host product is controlled by a microcontroller that also controls other functions in the host product. The GPS receiver includes an RF downconverter and a digital signal processor. The digital signal processor includes a correlator and an interface for asynchronously interfacing the correlator with the product'"'"'s microcontroller. A monolithic integrated circuit includes RF downconverter circuitry, the correlator, and the interface for the GPS receiver.

Claims

1. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal; and

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller and wherein said asynchronous interface includes at least one last latch for latching digital signals from said microcontroller.

2. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal; and

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller and wherein said asynchronous interface includes at least one last latch for latching digital signals from said correlator.

3. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal; and

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller and wherein at least a portion of said RF downconverter and at least a portion of said digital signal processor are disposed in a substantially monolithic integrated circuit.

4. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal, wherein said RF downconverter includes at least one amplifer, at least one mixer, at least one bandpass filter, and at least one local oscillator coupled to said at least one mixer, and wherein said at least one local oscillator includes a frequency synthesizer coupled to a reference oscillator;

a product oscillator, wherein said frequency synthesizer uses said product oscillator as said reference oscillator, and wherein said product oscillator provides a clock signal for said microcontroller; and

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller.

5. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal, wherein said RF downconverter includes at least one amplifer, at least one mixer, at least one bandpass filter, and at least one local oscillator coupled to said at least one mixer, and wherein said at least one local oscillator includes a frequency synthesizer coupled to a reference oscillator, wherein said at least one amplifier, said at least one mixer, said frequency synthesizer, and said correlator are disposed in a substantially monolithic integrated circuit; and

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller, and wherein said asynchronous interface is disposed in said substantially monolithic integrated circuit.

6. A receiver for a product, said product being controlled by a microcontroller, said receiver comprising:

a radio frequency (RF) downconverter for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal;

a digital signal processor coupled to said RF downconverter and to said microcontroller, said digital signal processor including a correlator for acquiring and tracking said at least one target signal in response to signals from said microcontroller, said digital signal processor including an asynchronous interface for interfacing said correlator with said microcontroller, and wherein said correlator includes;

(a) a signal input block for producing an in-phase signal and a quadrature signal from said IF signal;

(b) a pseudo-random noise (PN) generator for producing at least one PN signal;

(c) a signal processor, coupled to said signal input block and to said PN generator, for producing at least a prompt in-phase (PI) signal, from said at least one PN signal and said in-phase signal, and for producing a prompt quadrature (PQ) signal, from said at least one PN signal and said quadrature signal;

(d) an integrator, coupled to said signal processor, for integrating said PI signal and said PQ signal to provide an integrator output, said integrator output including an integrated PI signal and an integrated PQ signal; and

(e) an interrupt generator, said interrupt generator producing an interrupt signal at predetermined time intervals for signaling said microcontroller to read said integrator output.

7. The receiver of claim 6, wherein said signal input block of said correlator includes an analog to digital (A/D) converter and a demodulator.

8. A substantially monolithic integrated circuit for a receiver, said substantially monolithic integrated circuit comprising:

radio frequency (RF) downconverter circuitry for downconverting a radio frequency (RF) signal in a first band of frequencies to an intermediate frequency (IF) signal in a second band of frequencies, said RF signal including at least one target signal; and

a digital signal processor coupled to said RF downconverter circuitry, said digital signal processor including a correlator for acquiring and tracking said at least one target signal.

9. The receiver of claim 8, wherein said a least one target signal includes at least one global positioning system (GPS) signal.

10. The receiver of claim 9, wherein said at least one GPS signal is transmitted from at least one satellite.

11. The substantially monolithic integrated circuit of claim 8, wherein said RF downconverter circuitry includes:

at least one amplifier for producing an amplified signal;

at least one frequency synthesizer for producing a local oscillator signal; and

at least one mixer for mixing said amplified signal with said local oscillator signal.

12. The substantially monolithic integrated circuit of claim 11, wherein said frequency synthesizer is disposed to use an external reference oscillator.

13. The substantially monolithic integrated circuit of claim 11, wherein said frequency synthesizer is disposed to use at least one external frequency selective component.

14. The substantially monolithic integrated circuit of claim 11, further comprising a frequency divider for producing a clock signal for said digital signal processor from said local oscillator signal.

15. The substantially monolithic integrated circuit of claim 11, wherein said digital signal processor includes an interface for interfacing said correlator and said frequency synthesizer with an external microcontroller.

16. The substantially monolithic integrated circuit of claim 11, wherein said digital signal processor includes:

a random access memory; and

an interface for interfacing said correlator, said frequency synthesizer, and said random access memory with an external microcontroller.

17. The substantially monolithic integrated circuit of claim 8, wherein said digital signal processor includes an interface for interfacing said correlator with an external microcontroller.

18. The substantially monolithic integrated circuit of claim 17, wherein said interface is an asynchronous interface.

19. The substantially monolithic integrated circuit of claim 16, wherein said correlator includes:

(a) a signal input block for producing an in-phase signal and a quadrature signal from said IF signal;

(b) a pseudo-random noise (PN) generator for producing at least one PN signal;

(c) a signal processor, coupled to said signal input block and to said PN generator, for producing at least a prompt in-phase (PI) signal, from said at least one PN signal and said in-phase signal, and for producing a prompt quadrature (PQ) signal, from said at least one PN signal and said quadrature signal;

(d) an integrator, coupled to said signal processor, for integrating said PI signal and said PQ signal to provide an integrator output, said integrator output including an integrated PI signal and an integrated PQ signal; and

(e) an interrupt generator, said interrupt generator producing an interrupt signal at predetermined time intervals for signaling an microcontroller to read said integrator output.

20. The substantially monolithic integrated circuit of claim 19, wherein said signal input block of said correlator includes an analog to digital (A/D) converter and a demodulator.

21. A method of using a microcontroller to obtain data from a signal, said method comprising the steps of:

receiving a radio frequency (RF) signal in a first band of frequencies;

downconverting said RF signal to an intermediate frequency (IF) signal in a second band of frequencies;

digitizing said IF signal to provide a digital signal;

correlating said digital signal with a replica signal to provide output data;

generating an interrupt signal at predetermined time intervals; and

in response to said interrupt signal, said microcontroller reading said output data through an asynchronous interface, wherein said microcontroller generating a read signal, and wherein in response to said read signal, said asynchronous interface latching said output data to provide latched output data.

22. The method of claim 21, wherein said step of said microcontroller reading said output data further includes the steps of:

said microcontroller generating a select signal; and

in response to said select signal, said asynchronous interface transmitting at least a portion of said latched output data to said microcontroller.

23. A method of using a microcontroller to obtain data from a signal, said method comprising the steps of:

receiving a radio frequency (RF) signal in a first band of frequencies;

downconverting said RF signal to an intermediate frequency (IF) signal in a second band of frequencies;

digitizing said IF signal to provide a digital signal;

correlating said digital signal with a replica signal to provide output data;

generating an interrupt signal at predetermined time intervals; and

in response to said interrupt signal, said microcontroller reading said output data through an asynchronous interface;

said microcontroller writing input data to a signal generator, wherein transferring said input data from said microcontroller to said signal generator through said asynchronous interface; and

said signal generator generating said replica signal in response to said input data.

24. The method of claim 23, wherein said step of transferring said input data from said microcontroller to said signal generator includes the step of:

said microcontroller generating a select signal; and

in response to said select signal, said asynchronous interface latching said input data to said signal generator.