Characteristic evaluation apparatus for insulated gate type transistors

• US 6,373,274 B1
• Filed: 11/17/2000
• Issued: 04/16/2002
• Est. Priority Date: 08/25/1998
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation), Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Yamaguchi, Kenji
• Primary Examiner(s): Karlsen, Ernest
• Assistant Examiner(s): KOBERT, RUSSELL MARC
• Application Number:
  US09/714,148
• Time in Patent Office: 515 Days
• Field of Search: 324/719, 324/769, 324/765, 257/48, 716/4, 716/5
• US Class Current: 324/762.09
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: G01R 31/2837 Characterising or performance testing, e.g. of frequency response transient response G01R27/28
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means

Abstract

The accuracy of effective channel width extraction in drain current method is improved. There are prepared a transistor with a wide channel width serving as a reference, and a transistor with a narrow channel width that becomes a candidate for extraction (step ST1.1). From the characteristic curve of a plane formed by mask channel width and source-drain conductance, there is extracted a virtual point at which the change of source-drain conductance is estimated to be approximately zero even if the gate overdrive is finely changed. Then, the value of function F is calculated which is defined by the difference between the change of the conductance at the coordinate of the virtual point and the product obtained by multiplying the conductance per unit width by the change of the mask channel width (step ST1.6). From a shift amount (δ) which minimizes the standard deviation of the function F to be obtained (step ST1.7), the true threshold voltage of the transistor with the narrow channel width is determined (step ST1.10).

Claims

1. A computer readable storing medium storing a characteristic evaluation program of insulated gate type transistors for making a computer evaluate, from at least two insulated gate type transistors that differ from each other only in mask channel width, the characteristic of a second insulated gate type transistor having a more narrow mask channel width using the characteristic of a first installed gate type transistor having a wider mask channel width as a reference,

wherein said characteristic evaluation program is installed in a computer so that said computer functions as a characteristic evaluation apparatus for insulated gate type transistors, said apparatus comprising:

threshold voltage estimation means for extracting the threshold voltage of said first transistor, for estimating the threshold voltage of said second transistor, and for employing a value as estimated, as a first estimated value;

extraction means in which (i) a difference between a gate voltage of said first transistor and said extracted threshold voltage of said first transistor is defined as a first gate overdrive, and a difference between a gate voltage of said second transistors and said first estimated value is defined as a second gate overdrive, (ii) in an X-Y plane whose X-axis is said mask channel width and whose Y-axis is source-drain conductance, a virtual point at which a change of Y coordinate value is estimated to be approximately zero when said first and second gate overdrives are finely changed, is extracted from a characteristic curve exhibiting a relationship between said mask channel widths of said first and second transistors and said source-drain conductance, (iii) values of the X coordinate and Y coordinate at said virtual point are defined as second and third estimated values, respectively, and (iv) a slope of said characteristic curve at said virtual point is extracted and a value of said slope is employed as a fourth estimated value;

threshold voltage determination means in which (i) from said second to fourth estimated values, optimum second to fourth estimated values are found with which the change of said third estimated value is equal to the product of the change of said second estimated value and said fourth estimated value, in reply to fine changes of said first and second gate overdrives, (ii) an optimum first estimated value is determined which corresponds to said optimum second to fourth estimated values, and (iii) a true threshold voltage of said second transistor is determined based on said optimum first estimated value; and

channel narrowing determination means for determining a difference between said mask channel width and an effective channel width, based on said true threshold voltage.