DA converter and liquid crystal driving device incorporating the same

• US 6,373,419 B1
• Filed: 12/16/1999
• Issued: 04/16/2002
• Est. Priority Date: 12/16/1998
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Nakao, Tomoaki
• Primary Examiner(s): Jeanpierre, Peguy
• Assistant Examiner(s): LAUTURE, JOSEPH J
• Application Number:
  US09/461,810
• Time in Patent Office: 852 Days
• Field of Search: 341/154, 341/155, 340/728, 345/98, 345/211, 345/204
• US Class Current: 341/154
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H03M 1/76 using switching tree

Abstract

A standard voltage generating circuit produces 2^(N−1)+1 mutually different standard voltages. A selector circuit stores standard voltage pairs so that each of the digital signals corresponds to one of the standard voltage pairs. No standard voltage pairs produce the same mean value. Upon reception of an input digital signal, the selector circuit selects one of the standard voltage pairs which corresponds to the input digital signal and provides the standard voltages of the selected pair for output. The standard voltages provided for output by the selector circuit are supplied to a voltage follower circuit which provides an output voltage having a mean value of the input standard voltages. In a DA converter and a liquid crystal driving device incorporating the DA converter, despite a possible increase in the number of voltages required for a display of more colors and more half-tones, large increases in the number of circuit arrangement elements can be avoided and increases in manufacturing cost can be restrained, allowing the device to be built in a more compact size.

Claims

1. A digital-to-analogue converter for converting N-bit digital signals to analogue signals by generating mutually different standard voltages and providing 2^N output voltages based on the standard voltages according to the digital signals,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also so that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output; and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

a₁=1, a₂=2, a_n=a<sub>n−

1</sub>+2<sup>(n−

3</sup>(3<

n<

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

5. A digital-to-analogue converter as set forth in claims 1, 2, 3, or 4, wherein

the standard voltage generating means is a resistance type-potential divider circuit arranged from a plurality of resistor elements coupled to each other to provide the standard voltages at connecting portions between the resistor elements, and

the selector means stores 2^{(N− 1)} pairs, each including two identical standard voltages and 2<sup>(N−

1)</sup> pairs, each including standard voltages derived at ends of the resistor elements.

6. A digital-to-analogue converter as set forth in claims 1, 2, 3, or 4, wherein

the standard voltage generating means generates, as the standard voltages, voltages corresponding to every other one of the output voltages of the output means when listed in increasing order of magnitude.

7. A digital-to-analogue converter as set forth in claims 1, 2, 3, or 4, wherein

the output means includes an output section and a plurality of differential amplifier circuits,

each of the plurality of differential amplifier circuits includes an in-phase input terminal and an anti-phase input terminal to receive an input of the standard voltage provided by the selector means, and also includes a differential pair having a first conductive type MOS transistor disposed on the same side as the in-phase input terminal and a first conductive type MOS transistor disposed on the same side as the anti-phase input terminal, the MOS transistor of the differential pair has a source coupled to a power supply via a constant current source, the MOS transistor disposed on the same side as the in-phase input terminal has a drain grounded via a first load element and a gate coupled to the in-phase input terminal, and the MOS transistor disposed on the same side as the anti-phase input terminal has a drain grounded via a second load element and a gate coupled to one of the anti-phase input terminal,

the output section includes a second conductive type MOS transistor having a gate coupled to the drain of the MOS transistor disposed on the same side as the in-phase input terminal, a source grounded, and a drain coupled to a power supply via a constant current source as well as to a gate of the MOS transistor disposed on the same side as the anti-phase input terminal and an output terminal.

8. A digital-to-analogue converter as set forth in claim 7, wherein

the first conductive type MOS transistor is a P channel MOS transistor, and the second conductive type MOS transistor is an N channel MOS transistor.

9. A digital-to-analogue converter as set forth in claim 7, wherein

the first and second load elements each include an MOS transistor.

10. A digital-to-analogue converter as set forth in claim 9, wherein

the first and second load elements are part of a current mirror circuit.

11. A digital-to-analogue converter as set forth in claim 7, wherein

the first and second load elements each include a resistor element.

12. A digital-to-analogue converter as set forth in claim 7, wherein

the digital-to-analogue converter includes two sets of differential pairs.

13. A digital-to-analogue converter as set forth in claims 1, 2, 3, or 4, wherein

the output means includes an output section and a plurality of differential amplifier circuits,

each of the plurality of differential amplifier circuits includes an in-phase input terminal and an anti-phase input terminal to receive an input of the standard voltage provided by the selector means, and also includes a differential pair having a second conductive type MOS transistor disposed on the same side as the in-phase input terminal and a second conductive type MOS transistor disposed on the same side as the anti-phase input terminal, the MOS transistor of the differential pair has a source grounded via a constant current source, the MOS transistor disposed on the same side as the in-phase input terminal has a drain coupled to a power supply via a first load element and a gate coupled to the in-phase input terminal, and the MOS transistor disposed on the same side as the anti-phase input terminal has a drain coupled to a power supply via a second load element and a gate coupled to the anti-phase input terminal,

the output section includes a first conductive type MOS transistor having a gate coupled to the drain of the MOS transistor disposed on the same side as the in-phase input terminal, a source coupled to a power supply, and a drain grounded via a constant current source as well as to a gate of the MOS transistor disposed on the same side as the anti-phase input terminal and an output terminal.

14. A digital-to-analogue converter as set forth in claim 13, wherein

the first conductive type MOS transistor is a P channel MOS transistor, and the second conductive type MOS transistor is an N channel MOS transistor.

15. A digital-to-analogue converter as set forth in claim 13, wherein

the first and second load elements each include an MOS transistor.

16. A digital-to-analog converter as set forth in claim 15, wherein

the first and second load elements are part of a current mirror circuit.

17. A digital-to-analog converter as set forth in claim 13, wherein

the first and second load elements each include a resistor element.

18. A digital-to-analog converter as set forth in claim 13, wherein

the digital-to-analog converter includes two sets of differential pairs.

2. A digital-to-analogue converter for converting N-bit digital signals to analogue signals by generating mutually different standard voltages and providing 2^N output voltages based on the standard voltages according to the digital signals,

said digital-to-analogue converter comprising

standard voltage generating means for generating 2^(N−

1)+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also so that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output; and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

a₁=1, a₂=2, a_n=1+2<sup>(n−

2</sup>) (3≦

n≦

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

3. A digital-to-analogue converter for converting N-bit digital signals to analogue signals by generating mutually different standard voltages and providing 2^N output voltages based on the standard voltages according to the digital signals,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also so that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output; and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

a₁=1, a₂=2, a_n=2a<sub>n−

1</sub>−

1 (3≦

n≦

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

4. A digital-to-analogue converter for converting N-bit digital signals to analogue signals by generating mutually different standard voltages and providing 2^N output voltages based on the standard voltages according to the digital signals,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also so that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output; and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

one of the two switches of the switch pairs of the selector means is a switch D conducting when a bit is 0, the other is a switch U conducting when a bit is 1, and an end of the switch D and an end of the switch U are coupled to each other to form a common terminal, wherein

terminals d of the switches D of switch pairs SW(n−

1) located opposite to the common terminals are coupled to respective common terminals of a_n switch pairs out of switch pairs SW(n),

terminals u of the switches U of the switch pairs SW(n−

1) located opposite to the common terminals are coupled to respective common terminals of a_n switch pairs out of the switch pairs SW(n), and

the terminals d and u are coupled to a common terminal of one of the switch pairs SW(n),

where n is any given integral number equaling or larger than 2, a_n is the number of switch pairs for the n-th lowest bit, and SW(n−

1) collectively refers to the switch pairs for the n-th lowest bit.

19. A liquid crystal driving device for converting display data from digital to analogue for output via a liquid crystal driving voltage output terminal to apply the DA converted data to a liquid crystal display element, said liquid crystal driving device including a digital-to-analogue converter for converting display data by converting N-bit digital signals to analogue signals through generation of mutually different standard voltages and provision of 2^N output voltages based on the standard voltages according to the digital signal,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output, and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and

a₁=1, a₂=2, a_n=a<sub>n−

1</sub>+2<sup>(n−

3)</sup>(3≦

n≦

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

23. A digital-to-analog converter as set forth in claims 19, 2021, or 22, wherein

the standard voltages correspond to liquid crystal driving voltages representing every other half-tone levels.

20. A liquid crystal driving device for converting display data from digital to analogue for output via a liquid crystal driving voltage output terminal to apply the DA converted data to a liquid crystal display element, said liquid crystal driving device including a digital-to-analogue converter for converting display data by converting N-bit digital signals to analogue signals through generation of mutually different standard voltages and provision of 2^N output voltages based on the standard voltages according to the digital signal,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output, and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

a₁=1, a₂=2, a_n=1+2<sup>(n−

2)</sup>(3≦

n≦

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

21. A liquid crystal driving device for converting display data from digital to analogue for output via a liquid crystal driving voltage output terminal to apply the DA converted data to a liquid crystal display element, said liquid crystal driving device including a digital-to-analogue converter for converting display data by converting N-bit digital signals to analogue signals through generation of mutually different standard voltages and provision of 2^N output voltages based on the standard voltages according to the digital signal,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output, and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

a₁=1, a₂=2, a_n=2a<sub>n−

1</sub>−

1 (3≦

n≦

N) where a_n is the number of switch pairs of the selector means for the n-th lowest digit bit.

22. A liquid crystal driving device for converting display data from digital to analogue for output via a liquid crystal driving voltage output terminal to apply the DA converted data to a liquid crystal display element, said liquid crystal driving device including a digital-to-analogue converter for converting display data by converting N-bit digital signals to analogue signals through generation of mutually different standard voltages and provision of 2^N output voltages based on the standard voltages according to the digital signal,

said digital-to-analogue converter comprising:

standard voltage generating means for generating 2<sup>(N−

1)</sup>+1 mutually different standard voltages,

selector means for;

storing standard voltage pairs in advance so that none of the standard voltage pairs produces an identical mean value and also that each of the digital signals corresponds to one of the standard voltage pairs;

upon reception of one of the digital signals, selecting one of the standard voltage pairs corresponding to the received digital signal; and

providing the standard voltages constituting the selected standard voltage pair for output, and

output means for receiving the output standard voltages of the selector means, and providing as the output voltage a mean value of the received standard voltages, wherein the selector means includes switch pairs, each including two switches, for selecting one of two input signals according to data expressed in each bit of the N-bit digital signals, and wherein

one of the two switches of the switch pairs of the selector means is a switch D conducting when a bit is 0, the other is a switch U conducting when a bit is 1, and an end of the switch D and an end of the switch U are coupled to each other to form a common terminal, wherein

terminals d of the switches D of switch pairs SW(n−

1) located opposite to the common terminals are coupled to respective common terminals of a_n switch pairs out of switch pairs SW(n),

terminals u of the switches U of the switch pairs SW(n−

1) located opposite to the common terminals are coupled to respective common terminals of a_n switch pairs out of the switch pairs SW(n), and

the terminals d and u are coupled to a common terminal of one of the switch pairs SW(n),

where n is any given integral number equaling or larger than 2, a_n is the number of switch pairs for the n-th lowest bit, and SW(n−

1) collectively refers to the switch pairs for the n-th lowest bit.