Structure of a liquid crystal display and the method of manufacturing the same

• US 6,373,546 B1
• Filed: 07/14/1997
• Issued: 04/16/2002
• Est. Priority Date: 03/03/1997
• Status: Expired due to Term

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Kim, Jeom Jae
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): CHOWDHURY, TARIFUR RASHID
• Application Number:
  US08/892,438
• Time in Patent Office: 1,737 Days
• Field of Search: 349/43, 349/46, 349/147, 349/54, 349/152, 349/42, 349/41, 349/143, 349/139, 349/149
• US Class Current: 349/152
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458

Abstract

An active panel of a liquid crystal display having a thin film transistor and a pixel electrode arranged in a matrix pattern has a double gate bus line. On a substrate, a gate bus line, a gate electrode and a gate pad are formed using a first metal such as aluminum having low electrical resistance and a second metal such as chromium having surface stability. Then, a dummy source bus line and a dummy source pad are formed prior to forming a source bus line and a source pad so as to eliminate line disconnection due to the cracks thereof and to thereby reduce the defects of the active panel and the increase production yield of the manufacturing process.

Claims

1. A method of manufacturing a liquid crystal display comprising:

providing a substrate;

forming a gate bus line on the substrate;

forming an insulating layer on the gate bus line;

forming a dummy source pad on the insulating layer;

forming a source bus line and a source pad arranged to completely cover the dummy source pad;

forming a gate pad at an end of the gate bus line;

forming a source electrode;

forming a drain electrode at a distance from the source electrode;

forming a protection layer on the source electrode;

forming a drain contact hole on the drain electrode;

forming a source pad contact hole on the source pad;

forming a gate pad contact hole on the gate pad; and

forming a pixel electrode, a source pad connecting terminal and a gate pad connecting terminal on the protection layer.

2. A method of manufacturing a liquid crystal display comprising:

providing a substrate including a source pad region;

forming a first gate bus line using a first metal;

forming a second gate bus line covering the first gate bus line, a gate electrode extending from the second gate bus line and a gate pad at an end of the second gate bus line using a second metal;

forming a gate insulating layer on the gate electrode;

forming a semiconductor layer, a doped silicon layer and a dummy source pad on the gate insulating layer, said dummy source pad located substantially at an area of said source pad region; and

forming a source electrode, a drain electrode, a source bus line and a source pad on the semiconductor layer, using a third metal such that said source pad completely covers said dummy source pad.

3. A method according to claim 2, wherein the step of forming a dummy source pad includes the step of forming at least one of an intrinsic semiconductor layer and a doped semiconductor layer.

4. A method according to claim 2, wherein the step of forming the dummy source pad includes the step of forming a dummy source bus line over which the source pad is to be formed, using the same material used for forming the dummy source pad.

5. A method according to claim 2, further comprising the steps of:

forming a first gate electrode extending from the first gate bus line and a first gate pad at an end of the first gate bus line;

wherein the gate electrode comprised of the second metal forms a second gate electrode covering the first gate electrode; and

wherein the gate pad comprised of the second metal forms a second gate pad covering the first gate pad.

6. A method according to claim 2, wherein the first metal includes aluminum.

7. A method according to claim 2, wherein the second metal includes at least one of chromium, molybdenum, tantalum and antimony.

8. A method according to claim 2, wherein the third metal includes chromium.

9. A method of manufacturing a liquid crystal display comprising:

providing a substrate;

forming a first gate bus line using a first metal;

forming a second gate bus line covering the first gate bus line, a gate electrode extending from the second bus line and a gate pad at an end of the second gate bus line using a second metal;

forming a gate insulating layer on the gate electrode;

forming a semiconductor layer, a doped silicon layer and a dummy source pad on the gate insulating layer;

forming a source electrode, a drain electrode, a source bus line and a source pad on the semiconductor layer, using a third metal such that said source pad completely covers said dummy source pad;

forming a protection layer on the source electrode;

forming a drain contact hole on the drain electrode;

forming a source pad contact hole on the source pad;

forming a gate pad contact hole on the gate pad; and

forming a pixel electrode, a source pad connecting terminal and a gate pad connecting terminal on the protection layer.

10. A liquid crystal display comprising:

a substrate including a source pad region;

a first gate bus line on the substrate and including a first metal;

a second gate bus line covering the first gate bus line and including a second metal;

a gate electrode extending from the second gate bus line;

a gate pad at an end of the second gate bus line;

a gate insulating layer covering the gate electrode and the second gate bus line;

a semiconductor layer on the gate insulating layer and including an intrinsic semiconducting material;

a doped semiconductor layer on the semiconductor layer and including an impurity doped semiconducting material;

a dummy source bus line on the gate insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a dummy source pad at an area of the source pad region on the insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a source electrode on the doped semiconductor layer and including a third metal;

a source bus line on the dummy source bus line and being connected with the source electrode, the source bus line including the third metal;

a source pad on the dummy source pad so as to completely cover the dummy source pad and at an end of the source bus line, the source pad including the third metal; and

a drain electrode located at a distance away from the source electrode.

11. A liquid crystal display according to claim 10, further comprising:

a first gate electrode extending from the first gate bus line;

a first gate pad located at an end of the first gate bus line;

a second gate electrode covering the first gate electrode; and

a second gate pad covering the first gate pad.

12. A liquid crystal display according to claim 10, wherein the first metal includes aluminum.

13. A liquid crystal display according to claim 10, wherein the second metal comprises at least one of chromium, molybdenum, tantalum and antimony.

14. A liquid crystal display according to claim 10, wherein the third metal includes chromium.

15. A liquid crystal display comprising:

a substrate;

a first gate bus line on the substrate and including a first metal;

a second gate bus line covering the first gate bus line and including a second metal;

a gate electrode extending from the second gate bus line;

a gate pad at an end of the second gate bus line;

a gate insulating layer covering the gate electrode and the second gate bus line;

a semiconductor layer on the gate insulating layer and including an intrinsic semiconducting material;

a doped semiconductor layer on the semiconductor layer and including an impurity doped semiconducting material;

a dummy source bus line on the gate insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a dummy source pad on the insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a source electrode on the doped semiconductor layer and including a third metal;

a source bus line on the dummy source bus line and being connected with the source electrode and including the third metal;

a source pad on the dummy source pad so as to completely cover the dummy source pad and at an end of the source bus line, the source pad including the third metal;

a drain electrode located at a distance away from the source electrode;

a protection layer on the source electrode;

a source pad contact hole defined in the source pad;

a gate pad contact hole defined in the gate pad;

a drain contact hole defined in the drain electrode;

a source pad connecting terminal connected with the source pad through the source pad contact hole;

a gate pad connecting terminal connected with the gate pad through the gate pad contact hole; and

a pixel electrode connected with the drain electrode through the drain contact hole, the pixel electrode having a conductive material.

16. A liquid crystal display according to claim 15, wherein the conductive material includes indium tin oxide.

17. A liquid crystal display according to claim 15, wherein the first metal includes aluminum.

18. A liquid crystal display according to claim 15, wherein the second metal includes at least one of chromium, molybdenum, tantalum and antimony.

19. A liquid crystal display according to claim 15, wherein the third metal includes chromium.

20. A method of manufacturing a liquid crystal display, comprising:

providing a substrate;

forming a gate bus line and a gate pad on the substrate, the gate pad being at an end of the gate bus line;

forming an insulating layer on the gate bus line;

forming a dummy source pad on the insulating layer;

forming source and drain electrodes, a source bus line and a source pad arranged to completely cover the dummy source pad;

forming a protection layer on the source and drain electrodes, the protection layer having a gate pad contact hole, a source pad contact hole and a drain contact hole; and

forming a pixel electrode, a source pad connecting terminal and a gate pad connecting terminal on the protection layer.

21. A method according to claim 20, wherein the dummy source pad includes at least one of an intrinsic semiconductor layer and an impurity doped semiconductor layer.

22. A method according to claim 20, wherein the pixel electrode is electrically connected with the drain electrode through the drain contact hole.

23. A method according to claim 20, wherein the gate pad is electrically connected with the gate pad connecting terminal through the gate pad contact hole.

24. A method according to claim 20, wherein the source pad is electrically connected with the source pad connecting terminal through the source pad contact hole.

25. A method of manufacturing a liquid crystal display comprising:

providing a substrate;

forming a first gate bus line using a first metal;

forming a second gate bus line covering the first gate bus line, a gate electrode extending from the second gate bus line and a gate pad at an end of the second gate bus line using a second metal;

forming a gate insulating layer on the gate electrode;

forming a semiconductor layer, a doped silicon layer and a dummy source pad on the gate insulating layer;

forming a source electrode, a drain electrode, a source bus line and a source pad on the semiconductor layer, using a third metal such that the source pad completely covers the dummy source pad;

forming a protection layer on the source and drain electrodes, the protection layer having a gate pad contact hole, a source pad contact hole and a drain contact hole; and

forming a pixel electrode, a source pad connecting terminal and a gate pad connecting terminal on the protection layer.

26. A method according to claim 25, wherein the first metal includes aluminum.

27. A method according to claim 25, wherein the second metal includes at least one of chromium, molybdenum, tantalum and antimony.

28. A method according to claim 25, wherein the third metal includes chromium.

29. A liquid crystal display comprising:

a substrate;

a first gate bus line on the substrate and including a first metal;

a second gate bus line covering the first gate bus line and including a second metal;

a gate electrode extending from the second gate bus line;

a gate pad at an end of the second gate bus line;

a gate insulating layer covering the gate electrode and the second gate bus line;

a semiconductor layer on the gate insulating layer and including an intrinsic semiconducting material;

a doped semiconductor layer on the semiconductor layer and including an impurity doped semiconducting material;

a dummy source bus line on the gate insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a dummy source pad at an area of a source pad region on the insulating layer and including at least one of the intrinsic semiconducting material and the impurity doped semiconducting material;

a source electrode on the doped semiconductor layer and including a third metal;

a source bus line on the dummy source bus line and being connected with the source electrode and including the third metal;

a source pad on the dummy source pad so as to completely cover the dummy source pad and at an end of the source bus line, the source pad including the third metal;

a drain electrode located at a distance away from the source electrode;

a protective layer on the source and drain electrodes and having a source pad contact hole, a gate pad contact hole and a drain contact hole;

a source pad connecting terminal connected with the source pad through the source pad contact hole;

a gate pad connecting terminal connected with the gate pad through the gate pad contact hole; and

a pixel electrode connected with the drain electrode through the drain contact hole.

30. A liquid crystal display according to claim 29, further comprising:

a first gate electrode extending from the first gate bus line;

a first gate pad at an end of the first gate bus line;

a second gate electrode covering the first gate electrode; and

a second gate pad covering the first gate pad.

31. A liquid crystal display according to claim 29, wherein the first metal includes aluminum.

32. A liquid crystal display according to claim 29, wherein the second metal includes at least one of chromium, molybdenum, tantalum and antimony.

33. A liquid crystal display according to claim 29, wherein the third metal includes chromium.