Synchronization technique and method and apparatus for transmitting and receiving coded signals

• US 6,373,951 B1
• Filed: 02/26/1997
• Issued: 04/16/2002
• Est. Priority Date: 02/28/1996
• Status: Expired due to Term

• Current Assignee: Telex Communications Incorporated (Robert Bosch GmbH)
• Original Assignee: Telex Communications Incorporated (Robert Bosch GmbH)
• Inventors: Friesen, LaRhue G., Basine, Robert B., Jenkins, Keith E.
• Primary Examiner(s): Hayes, Gail
• Assistant Examiner(s): MEISLAHN, DOUGLAS J
• Application Number:
  US08/806,786
• Time in Patent Office: 1,875 Days
• Field of Search: 380/48, 380/50, 380/262, 380/265, 375/359, 375/360
• US Class Current: 380/262
• CPC Class Codes: H04L 9/065 Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
• CPC Class Codes: H04L 9/12 Transmitting and receiving encryption devices synchronised or initially set up in a particular manner

Abstract

To transmit encoded information such as for example voice messages between remote transceivers, a transmitter digitizes and encodes an audio signal and then transmits the resulting digital coded signal to the receiver. The receiver decodes the signal and converts it back to an audio signal. The received encoded digital signal is used to reset the timing clock in the receiver so that the timing is synchronized in the receiver and transmitter by the transmitted encoded information. The encoder transmits digital information to a shift register. Encoding switches select certain stages of the shift register and the transmitter transmits the exclusive-OR of the digitized message and the output of the selected stages. This signal is also the input to the shift register. The information transmitted to the receiver is a scrambled digital signal. In the receiver, the coded information synchronizes a clock for the shift register from the encoded digital signal that it receives and selects the stages of the shift register that unscramble the coded information for conversion to an audio signal suitable for the speaker.

Claims

1. A synchronizing circuit for transmitting data from a transmitter to a receiver comprising:

a receiver memory for storing multiple bit words;

a decoding circuit means for sensing coded signals representing data as multiple bit words and for transmitting the coded signals to a memory;

said decoding circuit communicating with said memory wherein the coded signals are decoded while the coded signals are in said memory;

clock means for generating clock pulses and transmitting them to one of said memory and said decoding circuit for synchronizing said one of said memory and said decoding circuit;

means for resetting said clock means;

said means for resetting said clock means including means for generating a timing signal in response to the multiple bit words and utilizing the timing signal to reset said clock means.

2. A circuit in accordance with claim 1 in which said clock means generates pulses at a frequency set to be identical to clock pulses in a transmitter.

3. A synchronizing circuit according to claim 1 in which said memory is a shift register and said means for generating a timing signal is connected to said decoding circuit to generate a timing signal upon said decoding circuit detecting the presence of encoded data in said memory.

4. A synchronizing circuit in accordance with claim 3 in which said means for generating a timing signal is electronically connected to said memory to control writing and reading into and from said memory.

5. A synchronizing unit in accordance with claim 3 in which said decoding circuit receives signals from said memory, alters said signals and applies them to the input of said memory.

6. A synchronizing circuit in accordance with claim 1 further including a decoder in said receiver for decoding said data;

said decoder including a plurality of setable switches whereby a particular transmitter and receiver may be set to communicate only with each other.

7. A method of synchronizing at least a first circuit and a second circuit that are not wired together for transmitting data comprising the steps of:

transmitting a data stream formed of multiple bit words from the first circuit to the second circuit wherein the data stream is digital and transmitted at a preset clock rate;

sensing at least one of said multiple bit words in said data stream and generating a timing signal in response thereto; and

utilizing said timing signal to reset an oscillator to provide clock pulses at said preset clock rate for synchronizing data flow in said second circuit as the data stream is decoded.

9. A receiver according to claim 7 in which the memory means is a shift register and the shift register shifts data through the clock means.

8. A receiver for asynchronous coded signals comprising:

a sensor for receiving a transmitted data stream formed of multiple bit words;

memory means for storing the data stream received by the sensor;

clock means in the receiver for synchronizing said data stream being received; and

means for generating timing signals from multiple bit words and using the timing signals to set the clock means.

10. A receiver in accordance with claim 8 further including:

an analog-to-digital converter for receiving the transmitted data stream and converting the data stream to a digital signal.

11. A receiver in accordance with claim 10 in which the sensor includes a receiving circuit for receiving encoded radio signals, converting the radio signals to audio signals and providing the audio signals to the memory means as multiple-digit words.

12. A receiver in accordance with claim 11 further including a decoder connected to a shift register for receiving the data stream, a timing pulse generator for generating a timing signal, said pulse generator being electrically connected to said decoder.

13. A receiver according to claim 11 in which the memory means is a shift register and the clock means shifts data through the shift register.

14. A method of decoding transmitted signals comprising the steps of:

sensing a data stream composed of encoded digital words;

conducting the data stream into a memory means;

synchronizing the conducting of said data stream with clock pulses from an oscillator; and

resetting said oscillator with said data stream upon sensing a digital word.

15. A method in accordance with claim 14 in which the step of resetting said oscillator includes the steps of decoding said digital word in a memory and generating a timing signal upon sensing a decoded word.

16. A method in accordance with claim 15 in which said timing signal is used to read out the decoded word and reset a clock.

17. A method in accordance with claim 14 in which the data stream is decoded as it enters a memory.

18. A method in accordance with claim 17 in which an altered version of the signals in the memory are combined with the signals written into the memory.

19. A transceiver system for transmitting a signal from a transmitter to a receiver that are not wired together comprising:

a transmitter for transmitting the signal as a digital stream;

a receiver for receiving the digital stream;

encoding circuit means in the transmitter for encoding the digital stream;

decoding circuit means in the receiver for decoding said digital stream;

first clock means in the transmitter for synchronizing said digital stream being transmitted;

second clock means in the receiver for synchronizing said digital stream;

said second clock means including means for receiving the digital stream and utilizing timing of at least one digit in said digital stream to reset its clock;

a memory in said transmitter; and

a memory in said receiver;

said encoding circuit means being connected to receive an output from said memory in said transmitter and combine the output from said memory in said transmitter with said data stream being entered into said memory, wherein said digital stream is encoded.

20. A transceiver system in accordance with claim 19 further including:

an analog-to-digital converter for converting analog information into digital data for transmission to the receiver as a digital stream;

a digital-to-analog converter for receiving the digital data transmitted to the receiver as a digital stream and converting it to an analog signal.

21. Apparatus in accordance with claim 19 further including:

said encoding circuit means and decoding circuit means including a plurality of setable switches whereby a particular transmitter and receiver may be set to communicate only with each other.

22. Apparatus in accordance with claim 21 in which said encoding circuit means includes a shift register, said setable switches connecting selected ones of the outputs of said shift register to an exclusive OR circuit, the output of said exclusive OR circuit being connected to the transmitter and to the input of said shift register, one other input to said shift register being connected to the digital input signal.

23. A method for the transmission of audio comprising:

converting audio into an analog signal;

converting the analog signal into a digital stream;

transmitting the digital stream at a pre-determined clock rate;

encoding the digital stream;

transmitting the encoded digital stream;

receiving the encoded digital stream;

decoding the encoded digital stream to form a digital signal;

utilizing the timing of the encoded digital stream to reset a clock in the receiver;

synchronizing the received encoded digital stream with the clock during decoding; and

combining a version of the decoded digital stream with the encoded digital stream as part of the decoding of the encoded digital stream.

24. A method in accordance with claim 23 further including the steps of:

converting the digital signal into an analog signal;

converting the analog signal to an audio signal.