Clock distribution circuit

• US 6,378,080 B1
• Filed: 12/28/1999
• Issued: 04/23/2002
• Est. Priority Date: 01/07/1999
• Status: Expired due to Term

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Mizuno, Masayuki, Anjo, Kenichiro
• Primary Examiner(s): BUTLER, DENNIS
• Application Number:
  US09/472,843
• Time in Patent Office: 847 Days
• Field of Search: 713/400, 713/500, 713/503, 713/600
• US Class Current: 713/500
• CPC Class Codes: G06F 1/10 Distribution of clock signals , e.g. skew

Abstract

A clock distribution circuit is provided with a plurality of blocks each having a plurality of circuits, a first clock driver which distributes a clock signal to each of the blocks, and second clock drivers each provided in one of the blocks. Each second clock drivers distributes the clock signal to each of the circuits in the block. A first wiring is connected between the first clock driver and each of the second clock drivers so that the clock signal arrives at each of the second clock drivers in the same phase. A plurality of second wirings are connected between the second clock drivers and each of the circuits in the block. The second wirings may consist of transmission lines. The second wirings have a maximum length equal to or smaller than a product of clock skew allowable and a propagation velocity of an electromagnetic wave propagating through the second wirings.

Claims

1. A clock distribution circuit comprising:

a plurality of blocks each having a plurality of circuits;

a first clock driver which distributes a clock signal to each of said blocks;

second clock drivers each provided in one of said blocks, each distributing said clock signal to each of said circuits in the block;

a first wiring connected between said first clock driver and each of said second clock drivers so that said clock signal arrives at each of said second clock drivers in the same phase; and

a plurality of second wirings connected between said second clock drivers and each of said circuits in the block, said second wirings consisting of transmission lines, said second wirings having a maximum length equal to or smaller than a product of clock skew allowable and a propagation velocity of an electromagnetic wave propagating through said second wirings.

2. The clock distributing circuit according to claim 1, wherein said first wiring consists of a transmission line.

3. The clock distribution circuit according to claim 1, wherein said first wiring between said second clock drivers has a substantial length obtained by multiplying a wavelength obtained from a frequency of said clock signal by an integer multiple of ¼

.

4. The clock distribution circuit according to claim 1, wherein each of said second wirings is formed to be smaller in width each time it branch out from the side of each of said second clock drivers.

5. The clock distribution circuit according to claim 1, wherein said first wiring is formed to be smaller in width each time it branches out from the side of said first clock driver.

6. The clock distribution circuit according to claim 1, wherein each of said second wirings is formed so high in wiring resistance that its ends can be approximated to RC distribution constant circuits.

7. A clock distribution circuit comprising:

a plurality of blocks each having a plurality of circuits;

a plurality of first clock drivers each of which supplies a clock signal to each of said blocks;

second clock drivers each provided in one of said blocks, each distributing said clock signal to each of said circuits in the block;

a plurality of first wirings connected between said first clock driver and said second clock driver in each of said blocks so that said clock signal arrives at said second clock drivers in the same phase; and

a plurality of second wirings connected between said second clock drivers and each of said circuits in the block, said second wirings consisting of transmission lines, said second wirings having a maximum length equal to or smaller than a product of clock skew allowable and a propagation velocity of an electromagnetic wave propagating through said second wirings.

8. The clock distributing circuit according to claim 7, wherein said first wiring consists of a transmission line.

9. The clock distribution circuit according to claim 7, wherein said first wiring between said second clock drivers has a substantial length obtained by multiplying a wavelength obtained from a frequency of said clock signal by an integer multiple of ¼

.

10. The clock distribution circuit according to claim 7, wherein each of said second wirings is formed to be smaller in width each time it branch out from the side of we each of said second clock drivers.

11. The clock distribution circuit according to claim 7, wherein said first wiring is formed to be smaller in width each time it branches out from the side of said first clock driver.

12. The clock distribution circuit according to claim 7, wherein each of said second wirings is formed so high in wiring resistance that its ends can be approximated to RC distribution constant circuits.