Lightly nitridation surface for preparing thin-gate oxides

• US 6,380,056 B1
• Filed: 10/23/1998
• Issued: 04/30/2002
• Est. Priority Date: 10/23/1998
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Twu, Jih-Churng, Shue, Shau-Lin
• Primary Examiner(s): WILCZEWSKI, MARY A
• Application Number:
  US09/177,190
• Time in Patent Office: 1,285 Days
• Field of Search: 438/786, 438/591, 438/261, 438/954, 438/287, 438/761, 438/762, 438/763, 438/769, 438/775, 438/131, 438/600, 438/956, 257/296, 257/310, 257/410, 257/411, 257/639
• US Class Current: 438/591
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/0223 formation by oxidation, e.g. oxidation of the substrate
• CPC Class Codes: H01L 21/02238 silicon in uncombined form, i.e. pure silicon
• CPC Class Codes: H01L 21/02247 formation by nitridation, e.g. nitridation of the substrate
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 21/3185 of siliconnitrides
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method for forming a dielectric layer upon a silicon layer. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a silicon layer. There is then formed through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material or a reducing material silicon nitride containing layer upon a partially consumed silicon layer derived from the silicon layer. There is then oxidized through use of a second thermal annealing method employing an oxidizing material containing atmosphere the silicon nitride containing layer to form an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer. The method is particularly useful in forming a gate dielectric layer with enhanced hot carrier resistance properties and enhanced dopant diffusion barrier properties within a field effect transistor (FET).

Claims

1. A method for forming a dielectric layer upon a silicon layer comprising:

providing a substrate having an upper silicon layer;

thermal annealing the upper silicon layer in a nitrogen containing annealing atmosphere in absence of an oxidizing material or a reducing material, to form a silicon nitride containing layer upon a partially consumed silicon layer derived from the upper silicon layer;

the nitrogen thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, a substrate temperature of from about 600 to 900°

C., and a nitrogen gas flow rate of from about 1 to 20 sccm;

oxidizing the silicon nitride containing layer and the partially consumed silicon layer in an oxidizing material containing annealing atmosphere, to form a gate dielectric comprised of an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer;

the oxidizing thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, a substrate temperature of from about 600 to 900°

C. and an oxygen gas flow rate of from about 1 to 20 sccm; and

forming a gate electrode over the gate dielectric layer.

2. The method of claim 1, wherein the substrate is employed within a microelectronics fabrication selected from the group consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.

3. The method of claim 1 wherein the upper silicon layer is formed from a silicon material selected from the group consisting of amorphous silicon materials, polycrystalline silicon materials and monocrystalline silicon materials.

4. The method of claim 1 wherein the oxidizing material containing atmosphere employs an oxygen and nitrogen containing oxidizing material which effects a process control with respect to:

a nitrogen concentration within the thermally oxidized silicon nitride containing layer, and a peak nitrogen concentration of the nitrogen concentration within the thermally oxidized silicon nitride containing layer.

5. The method of claim 1, wherein the silicon nitride containing layer is from about 1 to 20 Å

thick.

6. The method of claim 1, wherein the oxidized silicon nitride containing layer comprises an upper silicon nitride layer and a lower silicon oxide layer.

8. The method of claim 2, wherein the silicon nitride containing layer is from about 1 to 20 Å

thick.

9. The method of claim 2, wherein the substrate is employed within a microelectronics fabrication selected from the group consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.

7. A method for forming a dielectric layer upon a silicon layer comprising:

providing a substrate having an upper silicon layer;

forming through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material or a reducing material a silicon nitride containing layer upon a partially consumed silicon layer derived from the upper silicon layer;

the first thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, a substrate temperature of from about 600 to 900°

C., and a nitrogen gas flow rate of from about 1 to 20 sccm;

oxidizing through use of a second thermal annealing method employing an oxidizing material containing atmosphere the silicon nitride containing layer to form a gate dielectric comprised of an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer; and

forming a gate electrode over the gate dielectric layer.

10. The method of claim 7, wherein the silicon layer is formed from a silicon material selected from the group consisting of amorphous silicon materials, polycrystalline silicon materials and monocrystalline silicon materials.

11. The method of claim 7, wherein:

the oxidizing material is an oxygen containing oxidizing material; and

the reducing material is a hydrogen containing reducing material.

12. The method of claim 7, wherein the nitrogen containing atmosphere is selected from the group consisting of nitrogen atmospheres and nitrogen/insert gas mixture atmospheres.

13. The method of claim 7, wherein the oxidizing material containing atmosphere is selected from the group consisting of oxygen, ozone, nitrous oxide and nitric oxide atmospheres.

14. The method of claim 7, wherein the oxidizing material containing atmosphere employs an oxygen and nitrogen containing oxidizing material which effects a process control with respect to:

a nitrogen concentration within the thermally oxidized silicon nitride containing layer; and

a peak nitrogen concentration of the nitrogen concentration within the thermally oxidized silicon nitride containing layer.

15. The method of claim 7, wherein the thermally oxidized silicon nitride containing layer is employed as a dielectric layer within a microelectronics device selected from the group consisting of a capacitor and a field effect transistor (FET).

16. A method for forming a dielectric layer upon a silicon layer comprising:

providing a substrate having an upper silicon layer;

forming through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material or a reducing material a silicon nitride containing layer upon a partially consumed silicon layer derived from the upper silicon layer;

oxidizing through use of a second thermal annealing method employing an oxidizing material containing atmosphere the silicon nitride containing layer to form a gate dielectric comprised of an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer;

the second thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, a substrate temperature of from about 600 to 900°

C., and an oxygen gas flow rate of from about 1 to 20 sccm; and

forming a gate electrode over the gate dielectric layer.

17. The method of claim 16, wherein the oxidized silicon nitride containing layer comprises an upper silicon nitride layer and a lower silicon oxide layer.

18. The method of claim 16, wherein the substrate is employed within a microelectronics fabrication selected from the group consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.

19. The method of claim 16, wherein the silicon layer is formed from a silicon material selected from the group consisting of amorphous silicon materials, polycrystalline silicon materials and monocrystalline silicon materials.

20. The method of claim 16, wherein:

the oxidizing material is an oxygen containing oxidizing material; and

the reducing material is a hydrogen containing reducing material.

21. The method of claim 16, wherein the nitrogen containing atmosphere is selected from the group consisting of nitrogen atmospheres and nitrogen/inert gas mixture atmospheres.

22. The method of claim 16, wherein the oxidizing material containing atmosphere is selected from the group consisting of oxygen, ozone, nitrous oxide and nitric oxide atmospheres.

23. The method of claim 16, wherein the oxidizing material containing atmosphere employs an oxygen and nitrogen containing oxidizing material which effects a process control with respect to:

a nitrogen concentration within the thermally oxidized silicon nitride containing layer; and

a peak nitrogen concentration of the nitrogen concentration within the thermally oxidized silicon nitride containing layer.

24. The method of claim 16, wherein the thermally oxidized silicon nitride containing layer is employed as a dielectric layer within a microelectronics device selected from the group consisting of a capacitor and a field effect transistor (FET).

25. A method for forming a dielectric layer upon a silicon layer comprising:

providing a substrate having an upper silicon layer;

forming through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material a silicon nitride containing layer upon a partially consumed silicon layer derived from the upper silicon layer;

the first thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, and a substrate temperature of from about 600 to 900°

C.;

oxidizing through use of a second thermal annealing method employing a nitrogen and oxygen oxidizing material containing atmosphere the silicon nitride containing layer to form a gate dielectric comprised of an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer; and

forming a gate electrode over the gate dielectric layer.

26. The method of claim 25, wherein the silicon nitride containing layer is from about 1 to 20 Å

thick.

27. The method of claim 25, wherein the microelectronics fabrication is selected from the group consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.

28. The method of claim 25, wherein the silicon layer is formed from a silicon material selected from the group consisting of amorphous silicon materials, polycrystalline silicon materials and monocrystalline silicon materials.

29. The method of claim 25, wherein the nitrogen containing atmosphere is selected from the group consisting of nitrogen atmospheres, nitrogen/inert gas mixture atmospheres, ammonia atmospheres and ammonia/inert gas mixture atmospheres.

30. The method of claim 25, wherein the nitrogen and oxygen oxidizing material containing atmosphere is selected from the group consisting of at least one of oxygen and ozone with at least one of nitrogen, nitrous oxide and nitric oxide.

31. The method of claim 25, wherein the oxygen and nitrogen oxidizing material containing atmosphere effects a process control with respect to:

a nitrogen concentration within the thermally oxidized silicon nitride containing layer; and

a peak nitrogen concentration of the nitrogen concentration within the thermally oxidized silicon nitride containing layer.

32. The method of claim 25 wherein the thermally oxidized silicon nitride containing layer is employed as a dielectric layer within a microelectronics device selected from the group consisting of a capacitor and a field effect transistor (FET).

33. A method for forming a dielectric layer upon a silicon layer comprising:

providing a substrate having an upper silicon layer;

forming through use of a first thermal annealing method employing a nitrogen containing annealing atmosphere in absence of an oxidizing material a silicon nitride containing layer upon a partially consumed silicon layer derived from the upper silicon layer;

oxidizing through use of a second thermal annealing method employing a nitrogen and oxygen oxidizing material containing atmosphere the silicon nitride containing layer to form a gate dielectric comprised of an oxidized silicon nitride containing layer upon a further consumed silicon layer derived from the partially consumed silicon layer;

the second thermal annealing method being conducted within a reactor chamber under the conditions comprising a pressure of from about 700 to 760 torr, a substrate temperature of from about 600 to 900°

C., and an oxygen gas flow rate of from about 1 to 20 sccm; and

forming a gate electrode over the gate dielectric layer.

34. The method of claim 33, wherein the oxidized silicon nitride containing layer comprises an upper silicon nitride layer and a lower silicon oxide layer.

35. The method of claim 33, wherein the microelectronics fabrication is selected from the group consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.

36. The method of claim 33, wherein the silicon layer is formed from a silicon material selected from the group consisting of amorphous silicon materials, polycrystalline silicon materials and monocrystalline silicon materials.

37. The method of claim 33, wherein the nitrogen containing atmosphere is selected from the group consisting of nitrogen atmospheres, nitrogen/inert gas mixture atmospheres, ammonia atmospheres and ammonia/inert gas mixture atmospheres.

38. The method of claim 33, wherein the nitrogen and oxygen oxidizing material containing atmosphere is selected from the group consisting of at least one of oxygen and ozone with at least one of nitrogen, nitrous oxide and nitric oxide.

39. The method of claim 33, wherein the oxygen and nitrogen oxidizing material containing atmosphere effects a process control with respect to:

a nitrogen concentration within the thermally oxidized silicon nitride containing layer; and

a peak nitrogen concentration of the nitrogen concentration within the thermally oxidized silicon nitride containing layer.

40. The method of claim 33, wherein the thermally oxidized silicon nitride containing layer is employed as a dielectric layer within a microelectronics device selected from the group consisting of a capacitor and a field effect transistor (FET).