Semiconductor device having uniform spacers
DC CAFCFirst Claim
1. A semiconductor device arrangement comprising a semiconductor substrate having a mixture of operational gate arrangements and non-operational gate arrangements on a surface of the substrate, the space between said gate arrangements being substantially the same distance, each operational and non-operational gate arrangement having dielectric spacers which are of uniform shape and size, each spacer having substantially the same width and physically contacting the substrate, wherein removal of the non-operational gate arrangements provides operational gate arrangements on said substrate having uniformly sized spacers and different distances between the operational gate arrangements.
1 Assignment
Litigations
1 Petition
Accused Products
Abstract
A semiconductor device having both functional and non-functional or dummy lines, regions and/or patterns to create a topology that causes the subsequently formed spacers to be more predictable and uniform in shape and size.
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Citations
3 Claims
- 1. A semiconductor device arrangement comprising a semiconductor substrate having a mixture of operational gate arrangements and non-operational gate arrangements on a surface of the substrate, the space between said gate arrangements being substantially the same distance, each operational and non-operational gate arrangement having dielectric spacers which are of uniform shape and size, each spacer having substantially the same width and physically contacting the substrate, wherein removal of the non-operational gate arrangements provides operational gate arrangements on said substrate having uniformly sized spacers and different distances between the operational gate arrangements.
Specification