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Top layers of metal for high performance IC's

  • US 6,383,916 B1
  • Filed: 02/17/1999
  • Issued: 05/07/2002
  • Est. Priority Date: 12/21/1998
  • Status: Expired due to Term
First Claim
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1. A method for forming a top metallization system for high performance integrated circuits, comprising:

  • forming an integrated circuit containing a plurality of devices formed in and on a semiconductor substrate, with an overlaying interconnecting metallization structure connected to said devices and containing a plurality of first metal lines in one or more layers;

    depositing a passivation layer over said interconnecting metallization structure;

    depositing an insulating, separating layer of polymer over said passivation layer that is substantially thicker than said passivation layer;

    forming openings through said polymer insulating, separating layer and said passivation layer to expose upper metal portions of said overlaying interconnecting metallization structure;

    depositing metal contacts in said openings; and

    forming said top metallization system connected to said overlaying interconnecting metallization structure, wherein said top metallization system contains a plurality of top metal lines, in one or more layers, each of said top metal lines having a width substantially greater than said first metal lines.

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