Low dielectric constant material for integrated circuit fabrication

• US 6,383,951 B1
• Filed: 09/03/1998
• Issued: 05/07/2002
• Est. Priority Date: 09/03/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Li, Weimin
• Primary Examiner(s): Whitehead, Jr., Carl
• Assistant Examiner(s): Brophy, Jamie L.
• Application Number:
  US09/146,397
• Time in Patent Office: 1,342 Days
• Field of Search: 438/353, 438/355, 438/359, 438/404, 438/424, 438/431, 438/778, 438/781, 438/783, 438/784, 438/787, 438/790, 438/623, 438/637, 438/780, 438/786
• US Class Current: 438/781
• CPC Class Codes: C23C 16/30 Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
• CPC Class Codes: C23C 16/56 After-treatment
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/02362 formation of intermediate layers, e.g. capping layers or diffusion barriers
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing

Abstract

A method is provided for forming a material with a low dielectric constant, suitable for electrical isolation in integrated circuits. The material and method of manufacture has particular use as an interlevel dielectric between metal lines in integrated circuits. In a disclosed embodiment, methylsilane is reacted with hydrogen peroxide to deposit a silicon hydroxide layer incorporating carbon. The layer is then treated by exposure to a plasma containing oxygen, and annealing the layer at a temperature of higher than about 450° C. or higher.

Claims

1. A method of providing electrical isolation between conductive elements in an integrated circuit, comprising:

providing a substrate having a partially fabricated integrated circuit;

reacting an organosilane gas source with an oxidizing agent to form a layer over the substrate, the layer formed predominantly of silicon hydroxide and consisting of silicon, oxygen, carbon and hydrogen; and

plasma treating the silicon hydroxide layer without forming a layer thereover during the plasma treatment, thereby converting the silicon hydroxide layer to an insulating material having a lower dielectric constant.

2. The method of claim 1, wherein the organosilane gas source is methylsilane.

3. The method of claim 2, wherein the methylsilane is provided at a rate of about 80 sccm to 150 sccm.

4. The method of claim 3, wherein the oxidizing agent comprises hydrogen peroxide provided at a rate of about 0.5 g/min to 0.75 g/min.

5. The method of claim 1, wherein the insulating material is characterized by a dielectric constant of less than about 3.5.

6. The method of claim 5, wherein the insulating material is characterized by a dielectric constant of less than about 3.3.

7. The method of claim 1, further comprising depositing a layer of silicon oxynitride directly over the insulating material.

8. The method of claim 1, wherein plasma treating the silicon hydroxide layer comprises exposing the silicon hydroxide layer to a plasma including oxygen.

9. The method of claim 8, wherein the plasma is formed from a gas including a source gas selected from the group consisting of N₂O/N₂, O₂, O₃ and N₂O.

10. The method of claim 1, further comprising annealing the substrate at a temperature of greater than about 450°

C. after forming the silicon hydroxide layer.

11. The method of claim 10, wherein plasma treating is performed prior to annealing.

12. The method of claim 10, wherein annealing comprises heating the substrate to a temperature between about 500°

C. and 600°

C.

13. The method of claim 1, wherein between about 5% and 20% of silicon atoms in the layer of silicon hydroxide are associated with a carbon atom.

14. The method of claim 1, wherein plasma treating comprises exposing the silicon hydroxide layer to a plasma for between about 5 seconds and 10 minutes.

15. The method of claim 1, further comprising etching trenches in the insulating material and filling the trenches with a conductive material.

16. The method of claim 15, further comprising etching contact holes after etching trenches and before filling the trenches with the conductive material.

17. The method of claim 1, further comprising annealing the substrate at a temperature of greater than about 500°

C. after forming the silicon hydroxide layer.

18. The method of claim 17, further comprising etching trenches between transistor active areas in the substrate, wherein reacting the organosilane comprises filling the trenches.

19. The method of claim 17, wherein reacting the organosilane comprises forming the silicon hydroxide layer over a transistor gate electrode.

31. The method of claim 2, wherein the methylsilane is provided at a rate of about 50 sccm to 500 sccm.

32. The method of claim 3, wherein the oxidizing agent comprises hydrogen peroxide provided at a rate of about 0.2 g/min to 1.2 g/min.

20. A process for forming a low dielectric constant material, comprising:

reacting an organosilane gas, consisting of a methylsilane, with an oxidizing agent to form a first material on a substrate; and

exposing the first material to a plasma containing oxygen to convert the first material to a second material having a dielectric constant of less than about 3.5 without forming a layer thereover.

21. The process of claim 20, further comprising annealing the second material at a temperature of at least about 450°

C.

22. The process of claim 21, wherein annealing comprises heating the second material at a temperature of at least about 500°

C.

23. The process of claim 20, wherein reacting the organosilane gas comprises reacting methylsilane with hydrogen peroxide, wherein the first material comprises silicon hydroxide having carbon therein.

33. The method of claim 20, wherein the methylsilane is selected from the group consisting of methylsilane, dimethylsilane and trimethylsilane.

24. A process for forming a material consisting of a polysiloxane network incorporating carbon-to-silicon bonding with a dielectric constant less than about 3.5, comprising:

forming a layer of silicon hydroxide incorporating carbon, wherein between about 5% and 20% of silicon atoms in the layer of silicon hydroxide are associated with a carbon atom; and

annealing the layer at a temperature of at least about 500°

C.

25. The process of claim 24, wherein carbon atoms are bonded to the silicon atoms.

26. A process for forming a material consisting of a polysiloxane network incorporating carbon-to-silicon bonding with a dielectric constant less than about 3.5, comprising:

forming a layer of silicon hydroxide incorporating carbon;

annealing the layer at a temperature of at least about 500°

C.; and

plasma treating the layer of silicon hydroxide prior to annealing, wherein plasma treating does not deposit a layer over the layer of silicon hydroxide.

27. The process of claim 26, wherein annealing comprises heating the layer of silicon hydroxide to less than about 800°

C.

28. A method of forming electrically isolated conductive elements in an integrated circuit, comprising:

forming a non-fluorinated precursor material over a semiconductor substrate in a reaction chamber, the precursor material predominantly comprising silicon hydroxide;

treating the precursor material with a plasma comprising oxygen without forming a layer over the precursor material, thereby converting the precursor material into a treated material;

etching the treated material to form a plurality of trenches;

depositing a metal on the treated material into the trenches;

planarizing the metal so that the metal remains only in the trenches; and

annealing the substrate at at least 550°

C.

29. The method of claim 28, further comprising etching contact vias into floors of the trenches to expose underlying conductive elements.

30. The method of claim 28, wherein treating the precursor material with a plasma is conducted in a separate treatment chamber.