Multi-stage lookup for translating between signals of different bit lengths
First Claim
1. An apparatus for translating a first digital signal having a first number of bits to a second digital signal having a second number of bits, the first number of bits greater than the second number of bits, comprising:
- portioning logic which portions the first number of bits into a portion of bits and a plurality of delta subsets of bits, the size of the portion of bits being at least the size of the second number of bits;
a lookup table coupled to the portioning logic, the lookup table including a plurality of memory elements, the number of memory elements dependent on the number of delta subsets of bits; and
memory access logic coupled to the lookup table which sequentially performs a lookup in each of the memory elements, a first lookup to a first memory element performed using a first index equal to a combination of the portion of bits and a first delta subset of bits, a next lookup to a next memory element performed using a next index equal to a combination of a result of a previous lookup and a next delta subset of bits and the second digital signal provided by the result of a last lookup to a last memory element.
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Accused Products
Abstract
A method and apparatus is provided for translating an L-bit input signal to a W-bit output signal such as a virtual network identification signal to an internal virtual network signal. The translation is performed using a multi-stage lookup. The input signal is portioned into a plurality of subsets of bits. A first index to a first stage is provided by combining a portion of bits and a first delta subset of bits. A second index to a second stage is provided by combining data stored at the first index in the first stage and the a second delta subset of bits. The corresponding output signal is stored at the last index in the last stage. The use of the multi-stage lookup instead of a single-stage lookup reduces the memory required to perform the translation.
22 Citations
18 Claims
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1. An apparatus for translating a first digital signal having a first number of bits to a second digital signal having a second number of bits, the first number of bits greater than the second number of bits, comprising:
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portioning logic which portions the first number of bits into a portion of bits and a plurality of delta subsets of bits, the size of the portion of bits being at least the size of the second number of bits;
a lookup table coupled to the portioning logic, the lookup table including a plurality of memory elements, the number of memory elements dependent on the number of delta subsets of bits; and
memory access logic coupled to the lookup table which sequentially performs a lookup in each of the memory elements, a first lookup to a first memory element performed using a first index equal to a combination of the portion of bits and a first delta subset of bits, a next lookup to a next memory element performed using a next index equal to a combination of a result of a previous lookup and a next delta subset of bits and the second digital signal provided by the result of a last lookup to a last memory element. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for translating a first digital signal having a first number of bits to a second digital signal having a second number of bits, the first number of bits is greater than the second number of bits, comprising the steps of:
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portioning by portioning logic the first number of bits into a portion of bits and a plurality of delta subsets of bits, the size of the portion of bits being at least the size of the second number of bits;
providing a lookup table coupled to the portioning logic, the lookup table including a plurality of memory elements, the number of memory elements dependent on the number of delta subsets of bits; and
sequentially performing by memory access logic a lookup in each of the memory elements, the memory access logic coupled to the plurality of memory elements, a first lookup to a first memory element performed using a first index equal to a combination of the portion of bits and a first delta subset of bits, a next lookup to a next memory element performed using a second index equal to combination of a result of a previous lookup and a next delta subset of bits and the second digital signal provided by the result of a last lookup to a last memory element. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An apparatus for translating a first digital signal having a first number of bits to a second digital signal having a second number of bits, the first number of bits greater than the second number of bits, comprising:
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means for portioning which portions the first number of bits into a portion of bits and a plurality of delta subsets of bits, the size of the portion of bits being at least the size of the second number of bits;
a lookup table coupled to the means for portioning, the lookup table including a plurality of memory elements, the number of memory elements dependent on the number of delta subsets of bits; and
means for accessing memory coupled to the lookup table which sequentially performs a lookup in each of the memory elements, a first lookup to a first memory element performed using a first index equal to a combination of the portion of bits and a first delta subset of bits, a next lookup to a next memory element performed using a next index equal to a combination of a result of a previous lookup and a next delta subset of bits and the second digital signal provided by the result of a last lookup to a last memory element. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification