×

Method to reduce polysilicon depletion in MOS transistors

  • US 6,387,784 B1
  • Filed: 03/19/2001
  • Issued: 05/14/2002
  • Est. Priority Date: 03/19/2001
  • Status: Expired due to Fees
First Claim
Patent Images

1. A method of forming a polysilicon electrode with reduced dopant depletion comprising:

  • providing a substrate;

    forming a dielectric layer over said substrate;

    forming a polysilicon layer over said dielectric layer;

    in-situ amorphizing upper portion of said polysilicon layer by implanting ions into said polysilicon layer to form an amorphous (α

    -Si) layer over said polysilicon layer;

    then doping said polysilicon layer by implanting ions; and

    performing, laser irradiation of selected wavelength and fluence to melt and regrow said α

    -Si layer while at the same time driving said ions deeply into said polysilicon layer adjacent said underlying dielectric layer.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×