Method of extracting bits from modulated waveforms

• US 6,389,572 B1
• Filed: 05/28/1999
• Issued: 05/14/2002
• Est. Priority Date: 05/28/1999
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Palm, Inc. (TCL Technology Group Corp.)
• Inventors: Vertatschitsch, Edward Joseph, Garrabrant, Gary Walter
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Chase, Shelly A
• Application Number:
  US09/322,635
• Time in Patent Office: 1,082 Days
• Field of Search: 714/752, 714/758, 714/780, 375/225, 375/229
• US Class Current: 714/780
• CPC Class Codes: H03M 13/45 Soft decoding, i.e. using symbol reliability information H03M13/41 takes precedence
• CPC Class Codes: H03M 13/6331 Error control coding in combination with equalisation
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end

Abstract

A method for minimizing errors in a modulated signal transmitted over a transmission medium. The method is applied to the entire data block, thereby incorporating information about the parities of each row of data to fix and correct the errors in the row. Thereafter ISI removal is applied on a row by row basis, with such corrections being applied via soft decision coding. In particular, the data samples are first collected in a data block (or FEC block). A soft decision buffer is thereafter created by taking each sample involved. An FEC word is created by processing down each row of the soft decision buffer and creating a binary stream out of the sign bits for each table entry. This creates an estimate of the word by thresholding it around the zero level. A syndrome is generated via a comparison of the parity bits for each FEC word. The syndrome provides the most likely bit error positions, represented by an offset into the FEC word. The error positions map back into the array of soft decision buffer entries and the absolute value entries are summed for each corresponding position. This produces sets of numbers and the set with the smallest value is used to indicate the error pattern. The bits believed to be in error are flipped in the FEC word. ISI removal is applied to the soft decision buffer on a row-by-row basis (excluding the first row) to create an intermediate data frame, referred to as the Rx Frame. Upon completion, the process is repeated in the other direction for all of the rows except the last row, on a row-by-row basis. Upon completion, the data block errors will be minimized and the received block should match the transmitted block. The process therefore provides minimal data block errors, but at the same time uses less processing resources.

Claims

1. A method of extracting bits from modulated waveforms, the method comprising the steps of:

receiving analog data;

converting the analog data to digital data;

generating a sample table having entries arranged in rows, wherein each entry has multiple bits corresponding to the amplitude of a sampled bit at a symbol time;

for each row except the first row,

creating an estimate by thresholding around the zero level;

generating a most likely bit error pattern from the samples and flipping the erroneous bits;

performing intersymbol interference (ISI) level adjustment as derived from the previously processed row; and

repeating for each row in the reverse direction, except for the last row.

2. The method of claim 1, wherein an intermediate data frame is used to perform ISI level adjustment as derived from the previously processed row.

3. The method of claim 2, wherein after converting the analog data to digital data, the additional step of removing direct current (DC) components is applied.

4. The method of claim 3, wherein the steps of creating an estimate word by thresholding around the zero level and generating a most likely bit error pattern are further comprised of:

deriving an FEC word from a row of sample entries which includes data bits and parity bits, and

generating at least a one bit error syndrome by XORing the parity bits of the FEC word with parity bits derived from a look-up table using the FEC word data bits.

5. The method of claim 4, wherein the error syndrome further includes 2 bit error positions.

6. The method of claim 4, wherein the steps further include:

mapping each error syndrome into the sample table entries and summing the absolute values of the corresponding table entries to form a list of numbers.

7. The method of claim 6, wherein the steps further include:

determining the smallest number in the list and using it as the most likely error pattern, wherein the bits are flipped in the FEC word.

8. The method of claim 1, wherein for each row except the first row, the method further comprises proceeding from the top to the bottom of the sample table.

9. The method of claim 1, wherein the step of repeating for each row in the reverse direction except for the last row, includes going from the bottom to the top of the sample table.

10. A method for correcting errors in data blocks representing a modulated waveform, the method comprising the steps of:

receiving an analog input signal;

performing an analog to digital conversion on the signal;

removing DC components from the digital result;

extracting samples to fill columns of a sample table, the sample table being comprised of rows and columns of sample entries;

for each row except the first row, proceeding from the top to the bottom of the sample table,

creating an estimate by thresholding around the zero level;

generating at least one position of an error in the sample entries;

flipping the at least one bit represented by the error;

performing intersymbol interference (ISI) level adjustment as derived from the previously processed row;

repeating for each row in the reverse direction except the last row, as going from the bottom to the top of the sample table.

11. The method of claim 10, wherein an intermediate data frame is used to perform ISI level adjustment as derived from the previously processed row.

12. The method of claim 10, wherein the steps of creating and estimate and thresholding around the zero level and generating at least one position of an error are further comprised of:

deriving an FEC word from a row of sample entries which includes data bits and parity bits, and

generating at least a one bit error syndrome by XORing the parity bits of the FEC word with parity bits derived from a look-up table using the FEC word data bits.

13. The method of claim 12, wherein the error syndrome further includes the error positions of 2 bits.

14. The method of claim 12, wherein the steps further include:

mapping each error syndrome into the sample table entries and summing the absolute values of the corresponding table entries to form a list of numbers.

15. The method of claim 14, wherein the steps further include:

determining the smallest number in the list and using it as the most likely error pattern, wherein the bits are flipped in the FEC word.