Flexible package having very thin semiconductor chip, module and multi chip module (MCM) assembled by the package, and method for manufacturing the same

• US 6,392,143 B1
• Filed: 01/14/2000
• Issued: 05/21/2002
• Est. Priority Date: 01/18/1999
• Status: Expired due to Term

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Koshio, Yasuhiro
• Primary Examiner(s): Reichard, Dean A.
• Assistant Examiner(s): OLIVA, CARMELO B
• Application Number:
  US09/482,609
• Time in Patent Office: 858 Days
• Field of Search: 174/52.2, 174/52.3, 174/52.4, 174/250, 174/254, 361/748, 361/749, 361/750, 361/751, 361/760, 361/764, 361/767, 361/772, 361/773, 257/685, 257/686, 257/704, 257/723, 257/724, 257/778
• US Class Current: 174/528
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05684 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/32057 in side view
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/78 Apparatus for connecting with wire connectors
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83385 : Shape, e.g. interlocking features
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2225/1023 : the support being an insulating substrate
• CPC Class Codes: H01L 2225/1041 : Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0133 : Ternary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10252 : Germanium [Ge]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10272 : Silicon Carbide [SiC]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/10331 : Gallium phosphide [GaP]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

There is provided a flexible package which includes a flexible substrate on a principal surface of which a plurality of metal wirings are formed, a flexible semiconductor chip attached over the flexible substrate and having a plurality of bonding pads thereon, joint metals for connecting electrically the plurality of bonding pads and the plurality of metal wirings respectively, and a sealing member sandwiched between the flexible substrate and the flexible semiconductor chip. The flexible semiconductor chip in which thickness of the semiconductor chip is reduced smaller than the normally-used thickness to lower the rigidity is mounted. Also, the rigidity of the overall package is made smaller by reducing thicknesses of respective constituent parts of the package such as the flexible substrate, etc. Therefore, generation of the package crack due to displacement can be avoided. In addition, since the sealing member is sandwiched between the flexible substrate and the flexible semiconductor chip, the warpage of the package can be suppressed extremely small. Therefore, flatness of the flexible package as a single product can be assured sufficiently. Further, if a packaging substrate on a principal surface of which a plurality of packaging wirings are formed is prepared and then the plurality of packaging wirings are connected electrically to the plurality of metal wirings respectively, the module with high packaging reliability can be constructed. Moreover, if a plurality of flexible packages are laminated, a MCM having a small total thickness can be constructed.

Claims

1. A flexible package configured such that it can be attached on a curved surface, the flexible package comprising:

a flexible substrate having a thickness larger than 10 μ

m and smaller than or equal to 40 μ

m, disposing a plurality of metal wirings on a principal surface of the flexible substrate;

a flexible semiconductor chip, configured such that the chip can be bent to have a radius of curvature smaller than 80 mm, the chip being attached over the flexible substrate and having a plurality of bonding pads thereon;

joint metals for electronically connecting the plurality of bonding pads and the plurality of metal wirings, respectively; and

a sealing member sandwiched between the flexible substrate and the flexible semiconductor chip.

2. The flexible package of claim 1, wherein a thickness of the flexible semiconductor chip is larger than 10 μ

m and smaller than 100 μ

m.

3. The flexible package of claim 2, wherein a thickness of the flexible semiconductor chip is larger than 30 μ

m.

4. The flexible package of claim 2, wherein the flexible semiconductor chip is a silicon chip.

5. The flexible package of claim 1, wherein the flexible semiconductor chip is attached over the flexible substrate in a flip-chip configuration.

6. The flexible package of claim 1, wherein the flexible substrate is a polyethylene terephthalate substrate.

7. The flexible package of claim 6, wherein a thickness of the flexible substrate is larger than 10 μ

m and smaller than or equal to 38 μ

m.

8. The flexible package of claim 1, wherein the sealing member is material with a linear coefficient of thermal expansion α

=0.01 to 30 ppm/°

C.

9. The flexible package of claim 1, wherein the sealing member is material with a linear coefficient of thermal expansion α

=0.1 to 15 ppm/°

C.

10. The flexible package of claim 1, wherein the metal wirings on the flexible substrate are arranged as beam leads.

11. The flexible package of claim 1, wherein the joint metals for connecting the metal wirings on the flexible substrate are bumps made of highly conductive material.

12. The flexible package of claim 1, wherein the flexible semiconductor chip is cut to a rectangular shape having a base and a height, the base being longer than the height, grinding traces being formed on a back surface of the flexible semiconductor chip.

13. The flexible package of claim 12, wherein an angle between the grinding trace and the base is smaller than or equal to 10°

.

14. A flexible module configured such that it can be attached on a curved surface, the flexible module comprising:

a packaging substrate having a plurality of packaging wirings on a principal surface of the substrate;

a flexible substrate having a thickness larger than 10 μ

m and smaller than or equal to 40 μ

m, disposing a plurality of metal wirings electrically connected to the plurality of packaging wirings, respectively, on a principal surface;

a flexible semiconductor chip, configured such that the chip can be bent to have a radius of curvature smaller than 80 mm, the chip having a plurality of bonding pads and being attached over the principal surface of the flexible substrate;

joint metals for electrically connecting the plurality of bonding pads and the plurality of metal wirings respectively; and

a sealing member sandwiched between the flexible substrate and the flexible semiconductor chip.

15. The flexible module of claim 14, wherein a thickness of the flexible semiconductor chip is larger than 10 μ

m and smaller than 100 μ

m.

16. The flexible module of claim 14, wherein the flexible semiconductor chip is a silicon chip.

17. The flexible module of claim 14, wherein the flexible semiconductor chip is attached over the flexible substrate in a flip-chip configuration.

18. The flexible module of claim 14, wherein the flexible substrate is a polyethylene terephthalate substrate.

19. The flexible module of claim 18, wherein a thickness of the flexible substrate is larger than 10 μ

m and smaller than or equal to 38 μ

m.

20. The flexible module of claim 14, wherein the sealing member is material with a linear coefficient of thermal expansion α

=0.01 to 30 ppm/°

C.

21. The flexible module of claim 14, wherein the metal wirings on the flexible substrate are arranged as beam leads.

22. The flexible module of claim 14, wherein the packaging substrate is a curved packaging substrate.

23. A multi chip module configured such that it can be attached on a curved surface, the multi chip module comprising:

a packaging substrate having a plurality of packaging wirings on a principal surface of the substrate;

a first flexible substrate having a thickness larger than 10 μ

m and smaller than or equal to 40 μ

m, disposing a plurality of first metal wirings connected electrically to the plurality of packaging wirings, respectively, on a principal surface;

a first flexible semiconductor chip, configured such that the chip can be bent to have a radius of curvature smaller than 80 mm, having a plurality of first bonding pads and being attached over the principal surface of the first flexible substrate;

first joint metals for electrically connecting the plurality of first bonding pads and the plurality of first metal wirings, respectively;

a first sealing member sandwiched between the first flexible substrate and the first flexible semiconductor chip;

a second flexible substrate having a thickness larger than 10 μ

m and smaller than or equal to 40 μ

m, disposing a plurality of second metal wirings connected electrically to the plurality of first metal wirings, respectively, on a principal surface;

a second flexible semiconductor chip, configured such that the chip can be bent to have a radius of curvature smaller than 80 mm, having a plurality of second bonding pads and being attached over the principal surface of the second flexible substrate;

second joint metals for electrically connecting the plurality of second bonding pads and the plurality of second metal wirings, respectively; and

a second sealing member sandwiched between the second flexible substrate and the second flexible semiconductor chip.

24. The multi chip module of claim 23, wherein the first flexible substrate is folded at its peripheral portion such that the first metal wirings are positioned on an outside, and the first metal wirings on a folded portion of the first flexible substrate are connected to the packaging wirings via conductive materials.

25. The multi chip module of claim 23, wherein the second flexible substrate is folded at its peripheral portion such that the second metal wirings are positioned on an outside, and the second metal wirings on a folded portion of the second flexible substrate are connected to the first metal wirings via the conductive materials.

26. The multi chip module of claim 23, wherein the plurality of first metal wirings are formed of a plurality of first beam leads, and the plurality of second metal wirings are formed of a plurality of second beam leads.

27. The multi chip module of claim 26, wherein the plurality of first metal wirings and the plurality of second metal wirings are electrically connected mutually as pairs of corresponding wirings.

28. A method for manufacturing a module, comprising the steps of:

(a) reducing a thickness of a semiconductor chip to larger than 10 μ

m and smaller than 100 μ

m so that the chip can be bent to have a radius of curvature smaller than 80 mm;

(b) delineating a plurality of packaging wirings on a principal surface of a packaging substrate;

(c) delineating a plurality of metal wirings on a principal surface of a flexible substrate;

(d) mounting the semiconductor chip over the principal surface of the flexible substrate having a thickness larger than 10 μ

m and smaller than or equal to 40 μ

m; and

(e) aligning the plurality of packaging wirings and the plurality of metal wirings, and connecting electrically them mutually.

29. The method of claim 28, wherein the step of mounting the semiconductor chip deposits selectively a sealing member in a chip mounting region on a principal surface of the flexible substrate, and attaches the semiconductor chip at positions of the sealing member.

30. The method of claim 28, wherein the step of electrically connecting the packaging wirings and the metal wirings mutually, further comprises the steps of:

(a) selectively providing a first adhesive layer only onto exposed portions of the flexible substrate between the plurality of metal wirings;

(b) selectively providing a second adhesive layer only onto exposed portions of the packaging substrate between the plurality of packaging wirings; and

(c) aligning the metal wirings and the packaging wirings, and applying a predetermined pressure between the flexible substrate and the packaging substrate to bond the first adhesive layer and the second adhesive layer so that the metal wirings directly contact the packaging wirings.