Display device having a thin film transistor and electronic device having such display device

• US 6,392,255 B1
• Filed: 09/27/2000
• Issued: 05/21/2002
• Est. Priority Date: 09/27/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Isobe, Atsuo, Shibata, Hiroshi
• Primary Examiner(s): NGO, NGAN V
• Application Number:
  US09/671,780
• Time in Patent Office: 601 Days
• Field of Search: 257/59, 257/72, 257/296, 257/350
• US Class Current: 257/59
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors

Abstract

To provide a liquid crystal display device having high quality display with a high aperture ratio while securing a sufficient storage capacitor (Cs), and at the same time, by dispersing a load (a pixel writing-in electric current) of a capacitor wiring in a timely manner to effectively reduce the load. A scanning line is formed on a layer that is different from a gate electrode so that the capacitor wiring is arranged in parallel with a signal line. Each pixel is connected to the individually independent capacitor wiring via a dielectric. Therefore, variations in the electric potential of the capacitor wiring caused by a writing-in electric current of adjacent pixels can be avoided, thereby obtaining satisfactory display images.

Claims

1. A semiconductor device comprising:

a semiconductor film formed on an insulating surface;

a first insulating film formed on the semiconductor film;

a gate electrode and a first wiring formed on the first insulating film;

a second insulating film formed on the gate electrode and the first wiring;

a second wiring connected to the gate electrode, formed on the second insulating film; and

a third insulating film formed on the second wiring,

wherein the first wiring and the second wiring overlap via the second insulating film therebetween.

5. The semiconductor device according to claim 1 or 4 wherein a storage capacitor is formed in an overlapping portion between the first wiring and the second wiring with the second insulating film interposed as a dielectric layer of the capacitor.

7. The semiconductor device according to claim 1 or 2 wherein said first wiring extends in an orthogonal direction to said second wiring.

8. The semiconductor device according to claim 1 or 2 further comprising a third wiring connected to said semiconductor film, formed on said third insulating film.

9. The semiconductor device according to claim 8 wherein said third wiring is in contact with source or drain region of said semiconductor film.

10. The semiconductor device according to claim 1 or 2 further comprising a pixel electrode electrically connected to said semiconductor film.

11. The semiconductor device according to claim 1 or 2 wherein said first wiring extends in a direction parallel with said third wiring.

12. The semiconductor device according to claim 1 or 2 wherein said first wiring is a capacitor wiring.

13. The semiconductor device according to claim 1 or 2 wherein said second wiring is a scanning line.

14. The semiconductor device according to claim 1 or 2 wherein said third wiring is a signal line.

15. The semiconductor device according to claim 1 or 2 wherein said first insulating film is a gate insulating film.

16. The semiconductor device according to claim 1 or 2 wherein said semiconductor device is an active matrix liquid crystal display device.

17. The semiconductor device according to claim 1 or 2 wherein said semiconductor film is patterned in an island form.

18. The semiconductor device according to claim 1 or 2 wherein said semiconductor device is an active matrix type electro-luminescence display device.

19. An electronic device having the semiconductor device according to claim 1 or 2 wherein said electronic device is selected from the group consisting of a video camera, a digital camera, projector, a head mount display, a car navigation system, a personal computer, and a portable information terminal.

2. A semiconductor device comprising:

a semiconductor film formed on an insulating surface;

a first insulating film formed on the semiconductor film;

a gate electrode and a first wiring formed on the first insulating film;

a second insulating film formed on the gate electrode and the first wiring;

a second wiring connected to the gate electrode, formed on the second insulating film; and

a third insulating film formed on the second wiring,

wherein the first wiring and the semiconductor film overlap via the first insulating film therebetween.

3. The semiconductor device according to claim 2 wherein a storage capacitor is formed in an overlapping portion of the first wiring and the semiconductor film with the first insulating interposed therebetween as a dielectric film of the capacitor.

4. The semiconductor device according to claim 2 wherein the first wiring and the second wiring overlap with said second insulating film interposed therebetween.

6. The semiconductor device according to claim 2 wherein a portion of the semiconductor film overlapped with said first wiring is doped with an impurity for giving a conductivity type thereto.

20. A semiconductor device comprising:

a plurality of scanning lines formed over a substrate;

a plurality of signal lines formed over said substrate, extending in an orthogonal relation to said plurality of scanning lines;

a plurality of thin film transistors disposed at intersections of said scanning lines and said signal lines, each of said thin film transistors comprising a semiconductor layer having a channel forming region and a gate electrode formed over the channel forming region with a gate insulating film interposed therebetween;

a plurality of capacitor lines formed over said semiconductor layer with said gate insulating film interposed therebetween;

a first interlayer insulating film formed over said plurality of thin film transistors and said capacitor lines wherein said scanning lines are formed on said first interlayer insulating film and electrically connected to said thin film transistors through contact holes of said first interlayer insulating film;

a second interlayer insulating film formed over said scanning lines; and

a plurality of pixel electrodes formed over said second interlayer insulating film,

wherein said scanning lines overlap said capacitor lines with said first interlayer insulating film interposed therebetween to form a plurality of storage capacitors therebetween.

22. The semiconductor device according to claim 20 or 21 wherein said semiconductor device is an active matrix type electro-luminescence display device.

23. The semiconductor device according to claim 20 or 21 wherein said semiconductor device is an active matrix type liquid crystal display device.

24. An electronic device having the semiconductor device according to claim 20 or 21 wherein said electronic device is selected from the group consisting of a video camera, a digital camera, projector, a head mount display, a car navigation system, a personal computer, and a portable information terminal.

21. A semiconductor device comprising:

a plurality of scanning lines formed over a substrate;

a plurality of signal lines formed over said substrate, extending in an orthogonal relation to said plurality of scanning lines;

a plurality of thin film transistors disposed at intersections of said scanning lines and said signal lines, each of said thin film transistors comprising a semiconductor layer having a channel forming region and a gate electrode formed over the channel forming region with a gate insulating film interposed therebetween;

a plurality of capacitor lines formed over said semiconductor layer with said gate insulating film interposed therebetween; and

a plurality of pixel electrodes formed over said substrate and operationally connected to said plurality of thin film transistors,

wherein said capacitor lines extend in a direction parallel with said signal lines.