Integrated circuit substrate having through hole markings to indicate defective/non-defective status of same

• US 6,392,289 B1
• Filed: 04/15/1999
• Issued: 05/21/2002
• Est. Priority Date: 04/15/1999
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Tandy, Patrick W.
• Primary Examiner(s): Williams, Alexander O.
• Application Number:
  US09/292,395
• Time in Patent Office: 1,132 Days
• Field of Search: 257/678, 257/730, 257/731, 257/274, 257/680, 257/432, 257/433, 257/434, 257/435, 257/431, 257/81, 257/82, 174/52.4
• US Class Current: 257/678
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H05K 1/0269 for visual or optical inspection
• CPC Class Codes: H05K 2201/09063 Holes or slots in insulating substrate not used for electrical connections
• CPC Class Codes: H05K 2203/1394 Covering open PTHs, e.g. by dry film resist or by metal disc

Abstract

A method and apparatus is provided to identify defective laminate objects or package substrates having mounting sites for integrated circuit dies during the package substrate fabrication process. A hole is drilled or punched within the boundary of an individual package substrate contained within a larger laminate substrate and covered with a material layer coating composed of an opaque material such as a resist. The coating may then be selectively applied or removed at a later point during the fabrication process dependent upon whether the package substrate has been classified as defective or non-defective. After specific package substrates have been marked as defective, a light source and light collector are supplied to the fabrication process on opposite sides of the wafer. By shining the light source on the laminate substrate, defective package substrates can be identified by the passage of light through the hole which is no longer covered with resist. A package substrate may have one or many holes corresponding to one or many die mounting sites. Therefore, defective package substrates may be identified through the use of a simple light source and light collector and without the need for unnecessary expensive optical recognition or sorting machinery.

Claims

1. An integrated circuit package substrate for mounting at least one die, said package substrate having at least one hole, said at least one hole being blocked by a light blocking material which is selectively removable to indicate the status of said package substrate as defective or non-defective.

2. The package substrate of claim 1, wherein said light blocking material covers said at least one hole.

3. The package substrate of claim 1, wherein said light blocking material is initially applied to said package substrate and is selectively removed from covering said at least one hole to identify said package substrate as defective.

4. The package substrate of claim 1, wherein said light blocking material is present over said at least one hole for a package substrate which is non-defective.

5. The package substrate of claim 1, wherein said light blocking material is present over said at least one hole for a package substrate which is defective.

6. The package substrate of claim 1, wherein said light blocking material is located on at least one side of said package substrate.

7. The package substrate of claim 1, wherein said light blocking material is located on both sides of said package substrate.

8. The package substrate of claim 1, wherein said light blocking material is provided as a strip on said package substrate.

9. The package substrate of claim 1, wherein said light blocking material is formed of an opaque material.

10. The package substrate of claim 1, wherein said at least one hole is located outside of the area of said package substrate containing a mounting site and electrical connections for an integrated circuit die.

11. The package substrate of claim 1, further comprising a plurality of holes, each of said holes being blocked by a light blocking material which is selectively removable to form a code pattern.

12. The package substrate of claim 11, wherein said code pattern is representative of the existence and location of defects on said package substrate.

13. The package substrate of claim 11, wherein said code pattern is arranged to uniquely identify said package substrate.

14. The package substrate of claim 1, wherein said integrated circuit package has a plurality of mounting sites for integrated circuit dies.

15. The package substrate of claim 14, wherein said integrated circuit package has one hole for said plurality of mounting sites.

16. The package substrate of claim 14, wherein said integrated circuit package has one hole for each of said plurality of mounting sites.

17. An integrated circuit package substrate comprising a plurality of die mounting sites each for mounting an integrated circuit die, said package substrate having a hole, said hole being blocked by a light blocking material which is selectively removable to indicate the status of said package substrate as defective or non-defective.

18. An integrated circuit package substrate comprising a plurality of die mounting sites each for mounting an integrated circuit die, each of said die mounting sites having a hole, said hole being blocked by a light blocking material which is selectively removable to indicate the status of said package substrate as defective or non-defective.

19. An integrated circuit package substrate array comprising a plurality of separable package substrates for mounting at least one integrated circuit die, each of said package substrates having at least one hole, said at least one hole being blocked by a light blocking material which is selectively removable to indicate the status of said package substrate as defective or non-defective.

20. The integrated circuit package substrate array of claim 19, wherein said light blocking material is present over said at least one hole for a package substrate which is non-defective.

21. The integrated circuit package substrate array of claim 20, wherein said light blocking material is present over said at least one hole for a package substrate which is defective.

22. The integrated circuit package substrate array of claim 20, wherein each of said package substrates has a plurality of mounting sites for said integrated circuit dies.

23. The integrated circuit package substrate array of claim 22, wherein each of said package substrates has one hole per said plurality of mounting sites.

24. An integrated circuit package substrate for mounting at least one die, said package substrate having a plurality of holes, each of said holes being blocked by a light blocking material which is selectively removable from at least one of said holes to form a binary code pattern to indicate the status of said package substrate as defective or non-defective.