Method of forming coaxial silicon interconnects

• US 6,392,430 B1
• Filed: 11/27/2000
• Issued: 05/21/2002
• Est. Priority Date: 12/02/1997
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Hembree, David R., Wood, Alan G., Akram, Salman
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): SUNDARAM, T R
• Application Number:
  US09/722,866
• Time in Patent Office: 540 Days
• Field of Search: 324/755, 324/754, 324/757, 324/758, 324/760, 324/765, 324/158.1
• US Class Current: 324/750.26
• CPC Class Codes: G01R 1/0408 Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets G01R1/067 takes precedence; mass production testing systems G01R31/59; testing of connections G01R31/66; for testing printed circuit boards G01R31/2808
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06

Abstract

An interconnect apparatus for testing bare semiconductor dice comprises raised contact members on a semiconductive substrate. The contact members are covered with an insulation layer and a conductive cap connected by a conductive trace to a testing circuit. The trace is covered with coaxial layers of a silicon-containing insulation and a metal for shielding the trace from “crosstalk” and other interference. An apparatus for simultaneous testing of multiple dies on a wafer has thermal expansion characteristics matching those of the semiconductor die or wafer and provides clean signals.

Claims

1. An apparatus for use in the testing of a circuit of a semiconductor device having a plurality of bond pads, comprising:

a substrate having a surface including a first layer of insulation on a portion of said surface, said substrate having portions thereof for engaging said bond pads of said semiconductor device;

a plurality of raised contact members, each raised contact member positioned on said surface of said substrate for contacting at least a portion of at least a bond pad of said bond pads of said semiconductor device;

a plurality of conductive traces having at least one conductive trace connected to each raised contact member of said plurality of raised contact members;

a second layer of insulation overlying a portion of each of said plurality of conductive traces; and

a conductive layer overlying a portion of said second layer of insulation providing shielding to at least one conductive trace of said plurality of conductive traces.

2. The apparatus of claim 1, wherein said second layer of insulation and said conductive layer comprise substantially continuous layers of insulation overlying each of said conductive traces, overlying said substrate located between said substrate and said at least one conductive trace, and overlying noncontact portions of said plurality of raised contact members.

3. The apparatus of claim 1, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

4. The apparatus of claim 1, wherein said second layer of insulation comprises silicon dioxide.

5. The apparatus of claim 1, wherein said second layer of insulation comprises silicon nitride.

6. The apparatus of claim 1, wherein said substrate comprises a semiconductor material.

7. The apparatus of claim 1, wherein said substrate comprises silicon dioxide material.

8. The apparatus of claim 1, wherein said each of said plurality of raised contact members includes a projecting apex and a stop surface located adjacent to said projecting apex.

9. An apparatus for use in the testing of a circuit of a semiconductor device having a plurality of bond pads, comprising:

a substrate having an insulative surface on at least a portion thereof, said substrate to overlie at least a portion of said semiconductor device;

a plurality of raised contact members positioned on said insulative surface on at least a portion of said substrate for contacting a portion of each bond pad of said plurality of bond pads of said semiconductor device, each raised contact member of said plurality of raised contact members including a projecting apex and a stop surface located adjacent to said projecting apex;

a plurality of conductive traces, at least one conductive trace of said plurality of conductive traces connected to at least one raised contact member of said plurality of raised contact members;

a second insulative layer substantially overlying each conductive trace of said plurality of conductive traces; and

a conductive layer overlying said second insulative layer and each said conductive trace of said plurality of conductive traces providing shielding to each said conductive trace.

10. The apparatus of claim 9, wherein said second insulative layer and said conductive layer comprise layers overlying said plurality of conductive traces, overlying said substrate located between said substrate and said plurality of conductive traces, and overlying noncontact portions of said plurality of raised contact members.

11. The apparatus of claim 9, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

12. The apparatus of claim 9, wherein said second insulative layer comprises silicon dioxide.

13. The apparatus of claim 9, wherein said second insulative layer comprises silicon nitride.

14. The apparatus of claim 9, wherein said substrate comprises a semiconductor material.

15. The apparatus of claim 9, wherein said substrate comprises silicon dioxide material.

16. An apparatus for use in the testing of a circuit of a semiconductor device having a plurality of bond pads, comprising:

a substrate having a layer of insulating material located on at least a portion of the surface of said substrate, said substrate to overlie a portion of said semiconductor device;

a plurality of raised contact members positioned on said surface of said substrate, each raised contact member for contacting at least a portion of at least one bond pad of said semiconductor device;

a plurality of conductive traces, one conductive trace of said plurality of conductive traces connected to at least one raised contact member of said plurality of raised contact members;

a second layer of insulating material overlying each conductive trace of said plurality of conductive traces; and

a conductive layer overlying at least a portion said second layer of insulating material.

17. The apparatus of claim 16, wherein said second layer of insulating material and said conductive layer comprise substantially continuous layers overlying said plurality of conductive traces, overlying said substrate located between said substrate and said plurality of conductive traces, and overlying noncontact portions of said plurality of raised contact members.

18. The apparatus of claim 16, wherein said conductive layer comprises one of aluminum, titanium, tungsten, cobalt, nickel, molybdenum, and copper.

19. The apparatus of claim 16, wherein said second layer of insulating material comprises silicon dioxide.

20. The apparatus of claim 16, wherein said second layer of insulating material comprises silicon nitride.

21. The apparatus of claim 16, wherein said substrate comprises a semiconductor material.

22. The apparatus of claim 16, wherein said substrate comprises silicon dioxide material.

23. The apparatus of claim 16, wherein substantially each raised contact member of said plurality of raised contact members includes a projecting apex and a stop surface located adjacent to said projecting apex.