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Semiconductor integrated circuit

  • US 6,392,467 B1
  • Filed: 07/10/2000
  • Issued: 05/21/2002
  • Est. Priority Date: 10/24/1996
  • Status: Expired due to Fees
First Claim
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1. A semiconductor circuit having a NMOS pass gate network and a buffer circuit coupled to said NMOS pass gate network, said input of said buffer being coupled to an output of said pass gate network said NMOS pass gate network having a NMOSFET wherein an input signal for said NMOSFET is applied to the gate and body of said NMOSFET;

  • anda voltage regulation means to regulate the voltage applied to said semiconductor circuit wherein said regulated voltage is lower than 0.8 V.

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