Spread spectrum receiver with multi-bit correlator

• US 6,393,046 B1
• Filed: 04/25/1997
• Issued: 05/21/2002
• Est. Priority Date: 04/25/1996
• Status: Expired due to Term

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: SIRF Technology Incorporated (Qualcomm, Inc.)
• Inventors: Kohli, Sanjai, Cahn, Charles R., Chansarkar, Mangesh, Chen, Steven, Turetsky, Greg
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): Liu, Shuwang
• Application Number:
  US08/846,067
• Time in Patent Office: 1,852 Days
• Field of Search: 375/200, 375/134, 375/343, 375/130, 375/147, 375/140, 375/142, 375/150, 375/137, 320/342, 701/201, 701/213, 702/149, 342/357.11
• US Class Current: 375/134
• CPC Class Codes: G01C 21/26 specially adapted for navigation in a road network
• CPC Class Codes: G01C 22/00 Measuring distance traversed on the ground by vehicles, persons, animals or other moving solid bodies, e.g. using odometers, using pedometers
• CPC Class Codes: G01S 19/11 wherein the cooperating elements are pseudolites or satellite radio beacon positioning system signal repeaters
• CPC Class Codes: G01S 19/22 Multipath-related issues
• CPC Class Codes: G01S 19/235 Calibration of receiver components
• CPC Class Codes: G01S 19/29 carrier including Doppler, related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/30 code related G01S19/246 takes precedence
• CPC Class Codes: G01S 19/34 Power consumption
• CPC Class Codes: G01S 19/37 Hardware or software details of the signal processing chain
• CPC Class Codes: G01S 19/47 the supplementary measurement being an inertial measurement, e.g. tightly coupled inertial
• CPC Class Codes: G01S 19/49 whereby the further system is an inertial position system, e.g. loosely-coupled
• CPC Class Codes: G01S 19/50 whereby the position solution is constrained to lie upon a particular curve or surface, e.g. for locomotives on railway tracks
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/7085 using a code tracking loop, e.g. a delay-locked loop
• CPC Class Codes: H04B 1/709 Correlator structure
• CPC Class Codes: H04B 1/7095 Sliding correlator type
• CPC Class Codes: H04B 1/7115 Constructive combining of multi-path signals, i.e. RAKE receivers
• CPC Class Codes: H04B 2001/70706 using a code tracking loop, e.g. a delay locked loop
• CPC Class Codes: H04B 2201/70715 with application-specific features
• CPC Class Codes: H04B 7/216 Code division or spread-spectrum multiple access [CDMA, SSMA]
• CPC Class Codes: H04L 27/30 : wherein each code element is represented by a combination of frequencies

Abstract

A terrestrial C/A code GPS receiver system digitally samples, filters and stores a segment of 11 half chips of the received composite as a binary number and multiplexes this number for parallel correlation with each of a series of multibit code replicas for the satellites to be tracked. Each of the time delay specific correlation products are accumulated in a cell of a memory matrix so that at least twenty two delays for each satellite may be evaluated each code period providing fast reacquisition, even within a city intersection, as well as correction of multipath tracking and multipath interference. All cells of the memory matrix may be used for a acquisition of a single satellite in about 4 ms. Two satellite tracking, in addition to altitude hold, uses cross track hold alternating with clock hold to update the cross track estimate. Single satellite tracking uses cross track and clock hold together. Navigation data is updated with detected changes in motion including turns.

Claims

1. A spread spectrum receiver for processing signals from at least one of a plurality of transmitting sources each having an associated code, said receiver comprising:

a single multi-bit digital correlator for correlating each sequential segment of a spread spectrum signal with at least one series of differentially time delayed code replicas to generate a plurality of correlation results;

matrix means responsive to the correlator for accumulating the plurality of correlation results in a matrix of correlation magnitudes as a function of time delay; and

means for selectively configuring the matrix means to form either

a) n different code specific sets of m different time delayed correlation products or

b) n times m different time delayed correlation products for one code.

2. The receiver of claim 1 wherein the multi-bit digital correlator further comprises:

a set of correlators for simultaneously correlating portions of each sequential segment with portions of a segment of a code replica.

3. The receiver of claim 1 or 2 wherein the multi-bit correlator further comprises:

a series of single bit correlators, each for correlating a half code chip width portion of each sequential segment with a half code chip width portion of a segment of a code replica.

4. The receiver of claim 1 or 2 wherein

the correlation results are related to the correlation of the spread spectrum signal with each of the time delayed code replicas.

5. The receiver of claim 4 wherein the matrix means comprises:

a plurality of data cells, each for storing data related to the correlation of the spread spectrum signal with a single time delayed replica.

6. The receiver of claim 5 wherein the data in each data cell further comprises:

an arithmetic sum of segment data, each related to the correlation of a segment of the spread spectrum signal with a segment of one time delayed code replica.

7. The receiver of claim 6 wherein each segment data further comprises:

an arithmetic sum of the correlations of each of a plurality of portions of a segment of the spread spectrum signal with the time delayed code replica.

8. The receiver of claim 7 wherein each portion of a segment further comprises:

a half code chip width portion.

9. The receiver of claim 1 or 2 wherein

the correlation results are related to the correlation of the spread spectrum signal with each of a plurality of series of code source specific time delayed code replicas.

10. The receiver of claim 9 wherein the matrix means comprises:

a plurality of series of data cells, each series for storing data related to the correlation of the spread spectrum signal with a code specific series of time delayed replicas.

11. The receiver of claim 1 or 2, wherein each segment further comprises:

a signal sample having a duration of at least two half chip widths of one of the transmitted codes.

12. The receiver of claim 11, wherein the signal sample duration is at least five half chip widths.

13. The receiver of claim 11, wherein the number of half chip widths in each segment is proportional to a prime factor of the number of chip widths in each code period.

14. The receiver of claim 1 or 2 for use with C/A coded GPS signals, wherein each segment further comprises:

a signal sample having a duration of an integral number of half chip widths proportional to a number selected from 3, 11 and 31.

15. The receiver of claim 14 wherein the number of segments per code period is an integral number proportional to a different number selected from 3, 11 and 31.

16. The receiver of claim 15 wherein the number of code source specific series of time delayed replicas is an integral number proportional to the remaining number of 3, 11 and 31.

17. The receiver of claim 16 wherein the number of code source specific series of time delayed replicas related to each code sources is greater than one.

18. The receiver of claim 1 or 2, further comprising:

acquisition/tracking/reacquisition mode control means for selectively operating the receiver to use a plurality of code source specific series of time delayed replicas for at least one code period that are related to the same code source in an acquisition mode, and related to a plurality of different code sources in a tracking/reacquisition mode.

19. The receiver of claim 18 wherein the acquisition/tracking/reacquisition mode control means further comprises:

means for selectively operating the receiver to use a plurality of code source specific time delayed replicas related to each different code source in the tracking/reacquisition mode.

20. The receiver of claim 18 wherein the matrix means further comprises:

memory matrix means for storing the time delay specific sums in a fixed number of locations.

21. The receiver of claim 20 wherein the acquisition/tracking/reacquisition mode control means further comprises:

mode control means for storing time delay specific sums in all the fixed number of locations of the memory matrix means related to the same code source in the acquisition mode and related to a plurality of code sources in the tracking/reacquisition mode.

22. The receiver of claim 20 wherein the acquisition/tracking/reacquisition mode control means further comprises:

mode control means for storing at least two code source specific series of time delay specific sums related to each code source to file the fixed number of locations of the memory matrix means in the tracking/reacquisition mode.

23. The spread spectrum receiver of claim 1 or 2, wherein each time delay specific sum further comprises:

an indication over a code period of the accuracy of the related time delay as a measure of a range of the receiver to one of the code sources.

24. The receiver of claim 1 or 2, further comprising:

capture window expansion means for operating the multi-bit correlator for correlating each sequential segment of a spread spectrum signal with at least two series of differently time delayed code replicas.

25. The receiver of claim 24, wherein the at least two series of differently time delayed code replicas are sequential in time.

26. The receiver of claim 24, wherein the at least two series of differently time delayed code replicas are interlaced in time.

27. The receiver of claim 26, wherein the code replicas in the interlaced sets are separated by time delays smaller than the time delays within each set.

28. The receiver of claim 24, wherein each time delayed replica within a series is separated from other code replicas in that series by one half a code chip width.

29. The receiver of claim 28, wherein the code replicas in one of the series are separated from the code replicas in another of the series by less than one half a code chip width.

30. The receiver of claim 29, wherein the code replicas in one of the series are separated from the code replicas in another of the series by one quarter of a code chip width.

31. The receiver of claim 1 or 2 wherein the multi-bit correlator comprises:

m/2 one bit correlators.

32. The receiver of claim 31 wherein the matrix means further comprises:

m times n data cells for storing data related to the correlation of the spread spectrum signal with one or more code replicas.

33. The receiver of claim 31 wherein the multi-bit correlator produces m time delayed correlation products for each code.

34. The receiver of claim 1 or 2, further comprising:

acquisition mode means for operating the multi-bit correlator to form a plurality of sets of differently time delayed correlation products for each segment for the same code; and

means for selecting a code specific delay for the associated code when at least one of the correlation products for that code achieves a predetermined threshold.

35. The receiver of claim 1 or 2, further comprising:

tracking/reacquisition mode means for operating the multi-bit correlator to form sets of differently time delayed correlation products for each sequential segment for each of a plurality of different codes; and

means for selecting a code specific delay for each code when at least one of the correlation products for that code achieves a predetermined threshold.

36. The receiver of claim 1 or 2, wherein the matrix means further comprise:

means for selectively accumulating the power or amplitude of each correlation.

37. The receiver of claim 1 or 2, further comprising:

means for sampling the spread spectrum signal to form partial chip width samples; and

a sample register for collecting a sequential series of the partial chip samples to form each sequential segment.

38. The receiver of claim 37, wherein the multi-bit correlator operates upon a first sequential segment while the sample register collects a subsequent sequential segment.

39. The receiver of claim 37, wherein the multi-bit correlator operates on a first sequential segment to form a plurality of sets of differently time delayed correlation products while the sample register collects a subsequent sequential segment.

40. The receiver of claim 37, wherein the multi-bit correlator operates on the a sequential segment to form at least one set of differently time delayed correlation products for each code while the sample register collects a subsequent sequential segment.

41. The receiver of claim 1 or 2, further comprising:

coder means for providing a series of satellite specific, time delayed multi-chip segments of a replica of each code for correlation with each of the sequential segments.

42. The receiver of claim 41, wherein the coder means further comprises:

a code generator for generating partial chip samples of each code; and

a code register for collecting the partial chip samples of each code to form the multi-chip segments.

43. The receiver of claim 42, wherein each multi-chip segment in a satellite specific set of multi-chip replicas differs from the previous multi-chip segment by one partial code chip width.

44. The receiver of claim 43, wherein the code generator is synchronized to the multi-bit correlator to form a multi-chip correlation product upon the generation of each multi-chip segment.

45. The receiver of claim 44, wherein the multi-bit correlator further comprises:

a plurality of correlators operating in parallel to each correlate a partial chip portion of each sequential segment with a partial chip portion of each multi-chip segment to simultaneously produce each multi-chip correlation product.

46. The receiver of claim 1 or 2, wherein the series of time delayed code replicas further comprises:

a series of sequential time delayed code replicas covering a tracking window of time sufficient to track a prompt time delay from a selected code transmitter; and

additional time delayed code replicas covering a recapture window of time separate from the tracking window.

47. The receiver of claim 46, wherein the series of time delayed code replicas covering a tracking window further comprises:

early, prompt and late code replicas or prompt and early minus late code replicas.

48. The receiver of claim 47, wherein the recapture window is sufficiently large to include a prompt time delay correlation product for each code after predictable periods of code transmitter obscuration during normal operation of the receiver.

49. The receiver of claim 48, wherein the capture window is sufficiently large to include a prompt time delay correlation product after periods of code transmitter obscuration during operation of the receiver in a vehicle in an urban environment.

50. The receiver of claim 1 or 2, wherein the multi-bit correlator further comprises:

a local clock for synchronizing a series of satellite specific, time delayed multi-chip replicas for correlation with each of the sequential segments;

tracking means responsive to a tracking window subset of the matrix means for synchronizing the local clock with a clock associated with a source of the code being received; and

recapture means responsive to the remainder of the matrix means for synchronizing the local clock with a clock associated with a source of the code being received after being temporarily obscured.

51. The receiver of claim 50, wherein the remainder of the matrix means covers a recapture window of time sufficiently large to accommodate expected errors in the local clock in synchronizing replicas for correlation with sequential segments from the source of the code.

52. The receiver of claim 51, wherein the time delay spanned by the recapture window exceeds five half chips widths of the code.

53. The receiver of claim 1 or 2, further comprising:

tracking means responsive to the matrix means for tracking a prompt delay from a source of the code; and

means for monitoring correlation products representing lesser time delays than the prompt delay to detect the inaccurate tracking of a multipath signal from the source of the code.

54. The receiver of claim 53, further comprising:

multipath correction means responsive the matrix means for causing the tracking means to select the delay associated with the largest correlation product as the prompt delay.

55. The receiver of claim 1 or 2, further comprising:

tracking means responsive to the matrix means for selecting a time delay not equal to one of the time delays of the replicas as a prompt delay.

56. The receiver of claim 55, wherein the tracking means further comprises:

means for causing correlation products of two of the time delayed replicas to be equal; and

means for selecting the prompt delay in response to the ratio of the amplitude of the equal correlation products to a correlation product having a time delay therebetween.

57. The receiver of claim 56, wherein the equal correlation products are a fixed time delay apart.

58. The receiver of claim 57, wherein the fixed time delay is one chip width.

59. The receiver of claim 56, wherein the prompt time delay is selected to be less than half way between the time delays of the equal correlation products if the ratio of the amplitudes of the equal correlation products to a correlation product having a time delay half way between the time delays of the equal correlation products is greater than one.

60. The receiver of claim 56, wherein the prompt delay is selected to be more than half way between the time delays of the equal correlation products if the ratio of the amplitudes of the equal correlation products to a correlation product having a time delay half way between the time delays of the equal correlation products is less than one.

61. The receiver of claim 1 or 2, further comprising:

sampling means for forming digitized samples of signals received from code sources at a first rate;

digital filtering means for forming the sequential segments from the digitized samples at a second rate substantially slower than the first rate.

62. The receiver of claim 1 or 2, further comprising:

means for temporarily interrupting correlation for multiple code periods to reduce receiver energy consumption; and

means for resuming correlation to continue deriving code source specific information.

63. The receiver of claim 62, wherein the means for interrupting and resuming correlation alternate operation periodically.

64. The receiver of claim 63 wherein the period during which correlation is interrupted is a multiple of the code period and short enough so that unmodeled clock drift is less than the difference in time between the time delays used for the correlation of signals from a code source.

65. The receiver of claim 63 wherein the means for interrupting the correlation further comprises:

means for modeling clock drift to determine when to resume correlation.

66. The receiver of claim 63 wherein the means for resuming correlation further comprises:

means for synchronizing a local clock with a clock associated with a single source of the code.

67. The receiver of claim 63 further comprising:

means for engaging the means for interrupting the correlation when the local clock is synchronized.

68. The receiver of claim 63 further comprising:

means responsive to operator interaction to cause the means for resuming correlation to resume correlation of the signals from a plurality of code sources.