Programmable thermal management of an integrated circuit die

• US 6,393,374 B1
• Filed: 03/30/1999
• Issued: 05/21/2002
• Est. Priority Date: 03/30/1999
• Status: Expired due to Term

• Current Assignee: Sony Corporation Of America (Sony Group Corp.)
• Original Assignee: Intel Corporation
• Inventors: Burton, Edward A., Gunther, Stephen H., Rankin, Linda J., Pippin, Jack D.
• Primary Examiner(s): Assouad, Patrick
• Assistant Examiner(s): Raymond, Edward
• Application Number:
  US09/281,237
• Time in Patent Office: 1,148 Days
• Field of Search: 702/132, 702/133, 702/134, 361/93.8, 361/97, 361/103, 361/106, 374/11, 374/30, 374/102, 374/103, 374/152, 374/170, 374/182, 374/179, 713/300, 713/322, 713/323, 713/324
• US Class Current: 702/132
• CPC Class Codes: G01K 7/015 using microstructures, e.g. made of silicon
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A method and apparatus for power throttling to manage the temperature of an IC. A temperature sensor is manufactured on the same die as the IC components. The temperature sensor generates an output in response to junction temperature of the IC components. A state machine is coupled to receive the output of the temperature sensor and to provide power reduction functions in response to the temperature sensor output exceeding a maximum thermal value. The maximum thermal value is less than the maximum allowable temperature of the IC corresponding to maximum power consumption. Thus, the invention reduces power consumption at a thermal value lower that a potentially catastrophic value rather than shutting down the IC when catastrophic failure is imminent.

Claims

1. A method comprising:

determining a junction temperature for an integrated circuit;

comparing the junction temperature to a thermal maximum value, wherein the thermal maximum value is less than a temperature corresponding to maximum allowable power consumption for the integrated circuit; and

reducing power consumption by the integrated circuit when the junction temperature is greater than the thermal maximum value, by turning off a clock signal to the integrated circuit for a first predetermined period of time, and turning on the clock signal for a second predetermined period of time, wherein the ratio of the first predetermined time to the second predetermined time is greater than or equal to the ratio of the thermal maximum value to the maximum power temperature.

2. The method of claim 1, wherein turning on and turning off are repeated until the junction temperature is less than the thermal maximum value.

3. The method of claim 1, wherein the thermal maximum value is programmable.

4. The method of claim 1, wherein the step of reducing power consumption comprises reducing a frequency of a clock signal to the integrated circuit.

5. An apparatus comprising:

means for determining a junction temperature for an integrated circuit;

means for comparing the junction temperature to a thermal maximum value, wherein the thermal maximum value is less than a temperature corresponding to maximum allowable power consumption for the integrated circuit;

means for reducing power consumption by the integrated circuit when the junction temperature is greater than the thermal maximum value;

means for turning off a clock signal to the integrated circuit for a first predetermined period of time; and

means for turning on the clock signal for a second predetermined period of time, wherein the ratio of the first predetermined time to the second predetermined time is greater than or equal to the ratio of the thermal maximum value to the maximum power temperature.

6. The apparatus of claim 5, wherein the means for reducing power consumption comprises means for programming the thermal maximum value.

7. An apparatus comprising:

a integrated circuit manufactured on a die;

a thermal sensor manufactured on the die and thermally coupled to the integrated circuit;

a state machine coupled to the thermal sensor and to the integrated circuit, the state machine reducing power consumed by the integrated circuit in response to the thermal sensor detecting a junction temperature of the integrated circuit greater than a thermal maximum value, wherein the thermal maximum value is less than a maximum temperature value for the integrated circuit, wherein the state machine cyclically turns off a clock signal to the integrated circuit for a first predetermined period of time and turns on the clock signal for a second predetermined period of time, wherein the ratio of the first predetermined time to the second predetermined time is greater than or equal to the ratio of the thermal maximum value to the maximum power temperature, until the junction temperature is less than the thermal maximum value.

8. The apparatus of claim 7, wherein the state machine cyclically turns off a clock signal to the integrated circuit for a first predetermined period of time and turns on the clock signal for a second predetermined period of time until the junction temperature is less than the thermal maximum value.

9. The apparatus of claim 8, wherein the first predetermined time and the second predetermined time are programmable.

10. The apparatus of claim 7, wherein the thermal maximum value is programmable.

11. A processor comprising:

a thermal sensor that generates an output in response to a junction temperature of one or more integrated circuits in the processor;

a state machine coupled to receive the output from the thermal sensor, wherein the state machine reduces power consumption by the processor in response to the output of the thermal sensor being greater than a thermal maximum value, and further wherein the thermal maximum value is less than a temperature corresponding to a maximum power consumption by the processor, further wherein the state machine disables a clock signal to the one or more circuits of the processor for a first predetermined period of time and enables the clock signal for a second predetermined period of time, wherein the ratio of the first predetermined time to the second predetermined time is greater than or equal to the ratio of the thermal maximum value to the maximum power temperature.

12. The processor of claim 11, wherein the thermal sensor is manufactured on a common die with the processor.

13. The processor of claim 11, wherein the state machine disables a clock signal to the one or more circuits of the processor for a predetermined period of time.