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Multi-stream associative memory architecture for computer telephony

  • US 6,393,515 B1
  • Filed: 01/06/2000
  • Issued: 05/21/2002
  • Est. Priority Date: 09/16/1997
  • Status: Expired due to Term
First Claim
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1. A communications circuit coupled to at least one time division multiplexed bus carrying a plurality of data streams of time division multiplexed time slot data, the communications circuit comprising:

  • a plurality of content addressable memory blocks coupled to respective portions of the plurality of data streams of the time division multiplexed bus and configured to associate indicia of data storage locations with time slots of the respective streams; and

    time division multiplexed communications interface circuitry coupled to the plurality of content addressable memory blocks and configured to switch time division multiplexed time slot data from a first of the data streams to a second of the data streams using the content addressable memory blocks.

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