Copper seed layer repair technique using electroless touch-up

• US 6,395,164 B1
• Filed: 10/07/1999
• Issued: 05/28/2002
• Est. Priority Date: 10/07/1999
• Status: Expired due to Fees

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Fluegel, James E., Malhotra, Sandra G., Gaudiello, John G., Andricacos, Panayotis, Paunovic, Milan, Goldblatt, Ronald D.
• Primary Examiner(s): Wong, Edna
• Application Number:
  US09/414,224
• Time in Patent Office: 964 Days
• Field of Search: 427/98,250,304,443.1 205/157,165,186,187 428/678
• US Class Current: 205/157
• CPC Class Codes: C23C 18/161 from plating step, e.g. inkjet
• CPC Class Codes: C23C 18/1653 Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
• CPC Class Codes: C25D 7/123 Semiconductors first coated with a seed layer or a conductive layer
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76868 Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
• CPC Class Codes: H01L 21/76873 for electroplating

Abstract

An electroless touch-up process for repairing copper metallization deposited in dual damascene structures with high aspect ratios. An initial copper strike layer is produced by directional deposition techniques such that discontinuous sidewall coverage occurs. An evolutionary electroless touch-up process then proceeds to conformally grow the copper layer on all surfaces. The result of the evolutionary process is to produce a continuous copper strike layer that can be used with conventional electroplating techniques.

Claims

1. A method of repairing a non-continuous seed layer on a semiconductor substrate having a via or a trench, comprising the steps of:

depositing a seed layer by physical vapor deposition to a thickness of 25 to 2000 Angstroms on the surface of the semiconductor substrate, wherein the semiconductor substrate comprises at least one via or one trench;

coating the surface of the substrate with a solution including a reducing agent to cause a conformal layer of metal to deposit on a portion of the surface of the at least one via or one trench not covered by the seed layer;

thereby repairing discontinuities in the seed layer in said at least one via or one trench deposited in said depositing step, said coating step being an electroless process; and

performing an electroplating process on the substrate using the repaired seed layer.

2. The method defined in claim 1, wherein the coating step is performed at a temperature range of between room temperature and 200°

C.

3. The method defined in claim 1, wherein the step of coating the substrate comprises a repetitive process of coating the substrate to build up a continuous strike layer.