Method of producing semiconductor light-emitting element

• US 6,395,572 B1
• Filed: 03/03/2000
• Issued: 05/28/2002
• Est. Priority Date: 04/15/1999
• Status: Expired due to Term

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Ogura, Kotaro, Tsutsui, Tsuyoshi
• Primary Examiner(s): Pham, Long
• Application Number:
  US09/518,504
• Time in Patent Office: 816 Days
• Field of Search: 438/22,46,745
• US Class Current: 438/46
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

Semiconductor light-emitting elements are produced by providing a wafer substrate of GaP, epitaxially growing on this substrate a semiconductor layered structure including an n-type layer and a p-type layer of GaP for providing a light-emitting layer, forming top electrodes on the semiconductor layered structure each over a portion of the area corresponding to one of the chips into which the substrate is to be later divided, forming a bottom electrode on the bottom surface of the substrate, dicing the wafer substrate into the individual chips, and thereafter carrying out a surface-roughening process on externally exposed portions of the semiconductor structure by means of hydrochloric acid. Each of the top electrodes is of a three-layer structure with a contact metal layer which may be of an alloy of Au and makes an ohmic contact with the GaP of the semiconductor layered structure, a Mo layer on the contact metal layer and an Au layer on the Mo layer.

Claims

1. A method of producing semiconductor light-emitting elements, said method comprising the steps of:

providing a wafer substrate comprising GaP, having a top surface and a bottom surface;

epitaxially growing on said top surface of said substrated semiconductor layered structure including an n-layer and a p-type layer comprising GaP, said n-type layer and said p-type layer forming a light-emitting layer;

forming top electrodes on said semiconductor layered structure each over a portion of an area corresponding to one of chips into which said substrate is to be later divided, each of said top electrodes being free of Ti and of a three-layer structure consisting of a contact metal layer which makes an ohmic contact with the GaP of said semiconductor layered structure, a Mo layer on said contact metal layer and an Au layer on said Mo layer;

forming a bottom electrode on said bottom surface of said substrate;

dicing said wafer substrate into said chips; and

thereafter carrying out a surface-roughening process on externally exposed portions of said semiconductor layered structure by means of hydrochloric acid.

2. The method of claim 1 wherein said surface-roughening process is carried out to obtain surface roughness of 0.1-3 μ

m in terms of height difference between protrusions and indentations on said externally exposed portions.

3. The method of claim 1 wherein said top electrodes are formed by vacuum vapor deposition.

4. The method of claim 1 wherein said Mo layer is formed to a thickness of 100-3000 Å

.

5. The method of claim 1 wherein said contact metal layer comprises an alloy of Au, having a thickness of 500-3000 Å

.

6. The method of claim 1 wherein said Au layer is formed to a thickness of 2000-12000 Å

.

7. The method of claim 1 wherein said n-type layer and said p-type layer of said semiconductor layered structure are each formed to a thickness of 10-100 μ

m.

8. The method of claim 1 wherein said n-type layer and said p-type layer of said semiconductor layered structure are each made to have carrier concentration in the range of 5×

10¹⁷−

5×

10¹⁸ cm<sup>−

3</sup>.

9. The method of claim 1 wherein said surface-roughening process is carried out by means of a solution of hydrochloric acid with concentration at 10-35 weight %.

10. The method of claim 1 wherein said contact metal layer consists of one or more contact metal materials selected from the group consisting of alloys of Au with Be, alloys of Au with Zn and alloy of Au with Ni.

11. The method of claim 10 wherein said surface-roughening process is carried out to obtain surface roughness of 0.1-3 μ

m in terms of height difference between protrusions and indentations on said externally exposed portions.

12. The method of claim 10 wherein said top electrodes are formed by vacuum vapor deposition.

13. The method of claim 10 wherein said Mo layer is formed to a thickness of 100-3000 Å

.

14. The method of claim 10 wherein said contact metal layer comprises an alloy of Au, having a thickness of 500-3000 Å

.

15. The method of claim 10 wherein said Au layer is formed to a thickness of 2000-12000 Å

.

16. The method of claim 10 wherein said n-type layer and said p-type layer of said semiconductor layered structure are each formed to a thickness of 10-100 μ

m.

17. The method of claim 10 wherein said ntype layer and said p-type layer of said semiconductor layered structure are each made to have carrier concentration in the range of 5×

10¹⁷−

5×

10¹⁸ cm<sup>−

3</sup>.

18. The method of claim 10 wherein said surface-roughening process is carried out by means of a solution of hydrochloric acid with concentration at 10-35 weight %.