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Method and apparatus for receiving high speed signals with low latency

  • US 6,396,329 B1
  • Filed: 01/06/2000
  • Issued: 05/28/2002
  • Est. Priority Date: 10/19/1999
  • Status: Expired due to Term
First Claim
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1. A bus receiver comprising:

  • an integrator to accumulate charge in accordance with an input signal during an integration time interval defined by a start integration timing event and an end integration timing event to produce an output voltage; and

    a sense amplifier to sample and convert the output voltage from the integrator into a logic signal representing a state of the input signal in response to a sensing timing event that is substantially concurrent with the end integration timing event.

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