System and method for monitoring the operation of a power converter

• US 6,396,674 B1
• Filed: 04/11/2000
• Issued: 05/28/2002
• Est. Priority Date: 04/11/2000
• Status: Active Grant

• Current Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Original Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Inventors: Sankaran, Venkateswara Anand, Chen, Chingchi
• Primary Examiner(s): Leja, Ronald W.
• Application Number:
  US09/547,360
• Time in Patent Office: 777 Days
• Field of Search: 361/18,23,28,29,30,31,93.9,93.7,111 323/276,281,282,284,285 363/50
• US Class Current: 361/93.7
• CPC Class Codes: H02H 7/1225 responsive to internal faults, e.g. shoot-through avoiding shoot-through H02M1/38

Abstract

A fault detection circuit and method for monitoring a power converter system to identify faults. The detection circuit includes two comparator circuits each having one input connected to the dc bus of the power converter system and responsive to the voltage spikes that occur as a result of faults. The other inputs of the comparator circuits are respectively connected to first and second sources of reference voltages having preset limits. The outputs of the two comparator circuits are combined on an output lead, and a fault signal will be produced on the output lead when the voltage spike on the dc bus exceeds the limits.

Claims

1. A circuit for monitoring the voltage spikes occurring in a power converter system containing a bus having a resistive parameter (R) and an inductive parameter (L) comprising:

a first comparator circuit having first and second inputs;

a first reference level voltage source connected to the first input of the first comparator circuit for providing a first voltage level input signal;

a second comparator circuit having first and second inputs;

a second reference level voltage source connected to the second input of the second comparator circuit to provide a second voltage level input signal;

a dc voltage blocking circuit;

the second input of the first comparator circuit and the first input of the second comparator circuit being connected in common through the dc voltage blocking circuit to the bus of the power converter system and responsive to a voltage spike (V_spike) thereon;

wherein the first comparator circuit produces an output signal when a voltage spike on the bus exceeds the voltage level of the first voltage level input signal, and wherein the second comparator circuit produces an output signal when a voltage spike on the bus is lower than the voltage level of the second voltage level input signal.

2. The circuit of claim 1 wherein the power converter system bus includes a sensing resistor (R_sense ), and the dc voltage blocking circuit includes a capacitor (C_sense) to block dc signal components and to provide a (RC) time constant selected so that the voltage value measured across the sensing resistor (R_sense ) is the value of the voltage spike (V_spike).

3. The circuit of claim 1 further comprising a fault output lead connected to the outputs of the first and second comparator circuits for providing a fault signal when an output signal is present at the outputs of the first or the second comparator circuits.

4. The circuit of claim 1 wherein the power converter system further includes an inverter portion having a current (i_inv) and wherein a voltage (V_L) of the inductive parameter (L) of the bus is approximately equal to (V_spike) which is equal to (L) multiplied by (di_inv/dt).

5. A method for monitoring the voltage spikes (V_spike) occurring in a power converter system containing a bus having a resistive parameter (R) and an inductive parameter (L) comprising the steps of:

A. providing a first reference level voltage signal;

B. providing a second reference level voltage signal;

C. blocking the dc components of the bus voltage and providing the remaining voltage to a sensing resistor (R_sense ) in the bus of the power converter system;

D. comparing the voltage across the sensing resistor (R_sense) with the first reference level signal to provide a first comparison signal when the voltage across the sensing resistor is greater than the first reference level signal; and

E. comparing the voltage across the sensing resistor (R_sense) with the second reference level signal to provide a second comparison signal when the voltage across the sensing resistor is lower than the second reference signal.

6. The method of claim 5 wherein the step of blocking the dc signal components of the bus further includes using a sensing capacitor (C_sense) to provide a (RC) time constant selected so that the voltage value across the sensing resistor (R_sense) is the value of the voltage spike (V_spike).

7. The method of claim 5 further including the step of combining the first and second comparison signals to provide a fault indicating signal.

8. The method of claim 5 further including the step of providing a power converter system including an inverter portion having a current (i_inv) and wherein a voltage (V_L) of the inductive parameter (L) of the bus is approximately equal to (V_spike) which is equal to (L) multiplied by (di_inv/dt) where (i_inv) is the inverter current.