High-efficiency adaptive DC/AC converter
DC CAFCFirst Claim
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1. A DC to AC inverter circuit, comprising:
- an input voltage source;
a plurality of switches arranged in a full bridge configuration wherein opposite corners of said full bridge configuration being selectively coupled to said voltage source;
a transformer having a primary side and a secondary side, said primary side being selectively coupled to said voltage source in an alternating fashion through said full bridge switch configuration;
a load coupled to said secondary side of said transformer;
a pulse generator circuit generating a first pulse signal for driving one of the corner switches of said full bridge configuration;
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to the load and adapted to generate a second pulse signal for controlling the conduction state of a switch on the opposite corner of said switch being controlled by said first pulse signal, said second pulse signal having a first state which overlaps said first pulse signal to deliver an amount of power to said load determined by said feedback signal, and a second state which overlaps the first signal with a predetermined minimum overlap to deliver a predetermined minimum power to the load.
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Abstract
A CCFL power converter circuit is provided using a high-efficiency zero-voltage-switching technique that eliminates switching losses associated with the power MOSFETs. An optimal sweeping-frequency technique is used in the CCFL ignition by accounting for the parasitic capacitance in the resonant tank circuit. Additionally, the circuit is self-learning and is adapted to determine the optimum operating frequency for the circuit with a given load. An over-voltage protection circuit can also be provided to ensure that the circuit components are protected in the case of open-lamp condition.
303 Citations
19 Claims
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1. A DC to AC inverter circuit, comprising:
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an input voltage source;
a plurality of switches arranged in a full bridge configuration wherein opposite corners of said full bridge configuration being selectively coupled to said voltage source;
a transformer having a primary side and a secondary side, said primary side being selectively coupled to said voltage source in an alternating fashion through said full bridge switch configuration;
a load coupled to said secondary side of said transformer;
a pulse generator circuit generating a first pulse signal for driving one of the corner switches of said full bridge configuration;
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to the load and adapted to generate a second pulse signal for controlling the conduction state of a switch on the opposite corner of said switch being controlled by said first pulse signal, said second pulse signal having a first state which overlaps said first pulse signal to deliver an amount of power to said load determined by said feedback signal, and a second state which overlaps the first signal with a predetermined minimum overlap to deliver a predetermined minimum power to the load. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An inverter circuit comprising:
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an input voltage source;
a full bridge circuit comprising a first pair of switches arranged at opposite corners of a full bridge circuit, and a second pair of switches arranged at other opposite corners of said full bridge circuit, said first and second pair of switches being selectively coupled to said input voltage source such that said first pair of switches defines a first conduction path and said second pair of switches defines a second conduction path;
a transformer having a primary side and a secondary side, said primary side selectively coupled to said input voltage source in an alternating fashion through said first and second conduction paths;
a load coupled to said secondary side of said transformer;
a pulse generator generating a first pulse signal for controlling the conduction state of one of said first pair of switches;
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to said load and adapted to generate a second pulse signal for controlling the conduction state of a different one of said first pair of switches, said second pulse signal having a phase overlap with said first pulse signal to deliver power to said load only if said feedback signal is above a predetermined threshold. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A DC to AC inverter circuit comprising:
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a plurality of switches arranged in a full bridge configuration wherein switches on opposite corners of said full bridge being controlled in an alternating fashion;
a pulse generator circuit generating a first pulse signal for driving one of the corner switches of said full bridge configuration; and
a feedback control loop circuit receiving a feedback signal indicative of power being supplied by said switches to a load, said feedback loop adapted to generate a second pulse signal for controlling the conduction state of a switch on the opposite corner of said switch being controlled by said first pulse signal, said second pulse signal having a first state which overlaps said first pulse signal to deliver an amount of power to said load determined by said feedback signal, and a second state which overlaps the first signal with a predetermined mininum overlap to deliver a predetermined minimum power to the load.
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19. An inverter circuit comprising:
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a full bridge circuit comprising a first pair of switches arranged at opposite corners of a full bridge circuit, and a second pair of switches arranged at other opposite corners of said full bridge circuit, said first and second pair of switches being selectively coupled to said input voltage source such that said first pair of switches defines a first conduction path and said second pair of switches defines a second conduction path;
a pulse generator generating a first pulse signal for controlling the conduction state of one of said first pair of switches;
a feedback control loop circuit receiving a feedback signal indicative of power being supplied to a load coupled to said switches, and adapted to generate a second pulse signal for controlling the conduction state of a different one of said first pair of switches, said second pulse signal having a phase overlap with said first pulse signal to deliver power to said load only if said feedback signal is above a predetermined threshold.
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Specification