High performance system-on-chip using post passivation process and glass substrates
First Claim
1. A method of reducing electromagnetic losses, incurred by operational semiconductor devices or by thereto attached passive electrical components, said losses incurred in silicon that is in close physical proximity to said operational semiconductor devices or to said thereto attached passive electrical components, comprising:
- providing a semiconductor substrate, having a passive surface exposing unprocessed silicon in or on which no semiconductor devices have been created, further having an active surface exposing processed silicon in or on the surface of which semiconductor devices have been created, having points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
creating one or more layers of interconnects over the active surface of said substrate, said layers of interconnects comprising conductive interconnect lines or conductive contact points or conductive vias in one or more layers, with points of electrical contact having been provided in or on the surface of said overlaying interconnecting metalization structure, at least one of said points of electrical contact making contact with at least one of said conductive interconnect lines or said conductive contact points or said conductive vias provided in said one or more layers of said overlaying interconnecting metalization structure, at least one of said metal lines or said contact points or said conductive vias making contact with at least one of said points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
depositing a layer of passivation over the surface of said one or more layers of interconnects;
providing passive components on the surface of said passivation layer, creating a completed semiconductor device, said completed semiconductor device comprising at least one active semiconductor device created in or on the active surface of said substrate in addition having at least one electrical components overlying said at least one active semiconductor device, said completed semiconductor device being bounded by a first plane that is parallel with and located below the passive surface of said substrate, said first plane forming an interface between said unprocessed silicon of said substrate and said processed silicon of said substrate, further being bounded by a second plane that is parallel with said first plane and coincides with the surface of said passive components, further being bounded by a set of four planes that are perpendicular to the surface of said substrate;
coating the second surface of said completed semiconductor device with a layer of adhesive material, having a surface;
attaching said completed semiconductor device to a glass panel by pressing said surface of said adhesive layer against said glass panel;
removing said unprocessed silicon, starting at the passive surface of said substrate, to about said first plane of said completed semiconductor device; and
removing said unprocessed silicon from in between adjacent completed semiconductor devices, using methods of etching, said removal being bounded by said set of four planes bounding said completed semiconductor device.
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Accused Products
Abstract
A new method is provided to create semiconductor devices. A completed semiconductor device that may or may contain passive electrical components is attached to a glass panel by means of an adhesive layer. The surface of the raw silicon layer of the substrate is now removed in addition to the silicon that is present between adjacent circuits. The objective of the process of the invention is to remove as much of the raw, loss inducing silicon as possible thus eliminating losses that are induced by the silicon substrate and as a consequence improving the quality of the passive components that overly the active surface of the substrate. By removing silicon from between adjacent circuits, interference between adjacent circuits is also eliminated.
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Citations
40 Claims
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1. A method of reducing electromagnetic losses, incurred by operational semiconductor devices or by thereto attached passive electrical components, said losses incurred in silicon that is in close physical proximity to said operational semiconductor devices or to said thereto attached passive electrical components, comprising:
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providing a semiconductor substrate, having a passive surface exposing unprocessed silicon in or on which no semiconductor devices have been created, further having an active surface exposing processed silicon in or on the surface of which semiconductor devices have been created, having points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
creating one or more layers of interconnects over the active surface of said substrate, said layers of interconnects comprising conductive interconnect lines or conductive contact points or conductive vias in one or more layers, with points of electrical contact having been provided in or on the surface of said overlaying interconnecting metalization structure, at least one of said points of electrical contact making contact with at least one of said conductive interconnect lines or said conductive contact points or said conductive vias provided in said one or more layers of said overlaying interconnecting metalization structure, at least one of said metal lines or said contact points or said conductive vias making contact with at least one of said points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
depositing a layer of passivation over the surface of said one or more layers of interconnects;
providing passive components on the surface of said passivation layer, creating a completed semiconductor device, said completed semiconductor device comprising at least one active semiconductor device created in or on the active surface of said substrate in addition having at least one electrical components overlying said at least one active semiconductor device, said completed semiconductor device being bounded by a first plane that is parallel with and located below the passive surface of said substrate, said first plane forming an interface between said unprocessed silicon of said substrate and said processed silicon of said substrate, further being bounded by a second plane that is parallel with said first plane and coincides with the surface of said passive components, further being bounded by a set of four planes that are perpendicular to the surface of said substrate;
coating the second surface of said completed semiconductor device with a layer of adhesive material, having a surface;
attaching said completed semiconductor device to a glass panel by pressing said surface of said adhesive layer against said glass panel;
removing said unprocessed silicon, starting at the passive surface of said substrate, to about said first plane of said completed semiconductor device; and
removing said unprocessed silicon from in between adjacent completed semiconductor devices, using methods of etching, said removal being bounded by said set of four planes bounding said completed semiconductor device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 35, 37)
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11. A method of reducing electromagnetic losses incurred by operational semiconductor devices or by thereto attached electrical components, said losses incurred in silicon that is in close physical proximity to said operational semiconductor devices or to said thereto attached electrical components, comprising:
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providing a semiconductor substrate, having a passive surface exposing unprocessed silicon in or on which no semiconductor devices have been created, further having an active surface exposing processed silicon in or on the surface of which semiconductor devices have been created, having points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
depositing a layer of passivation over the surface of said semiconductor devices created in or on the active surface of said substrate;
providing components on the surface of said layer of passivation, creating a completed semiconductor device, said completed semiconductor device comprising at least one active semiconductor device created in or on the active surface of said substrate, in addition having at least one electrical component overlying said at least one active semiconductor device, said completed semiconductor device being bounded by a first plane that is parallel with and located below the passive surface of said substrate that forms an interface between said unprocessed silicon of said substrate and said processed silicon of said substrate, further being bounded by a second plane that is parallel with said first plane and coincides with the surface of said electrical components, further being bounded by a set of four planes that are perpendicular to the surface of said substrate;
coating the surface of said electrical components with a layer of adhesive material, having a surface;
attaching said completed semiconductor device to a glass panel by pressing said surface of said adhesive layer against said glass panel;
removing said unprocessed silicon, starting at the passive surface of said substrate, to about said first plane of said completed semiconductor device, using methods of backside grinding or Chemical Mechanical Polishing (CMP); and
removing said unprocessed silicon from in between adjacent completed semiconductor devices, using methods of etching, said removal being bounded by said set of four planes bounding said completed semiconductor device. - View Dependent Claims (12, 13, 14, 15, 16, 17, 38)
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18. A structure for reducing electromagnetic losses, incurred by operational semiconductor devices or by thereto attached passive electrical components, said losses incurred in silicon that is in close physical proximity to said operational semiconductor devices or to said thereto attached passive electrical components, comprising:
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a semiconductor substrate, having a passive surface exposing unprocessed silicon in or on which no semiconductor devices have been created, further having an active surface exposing processed silicon in or on the surface of which semiconductor devices have been created, having points of electrical contact provided to staid semiconductor devices in or on the active surface of said substrate;
one or more layers of interconnects over the active surface of said substrate, said layers of interconnects comprising conductive interconnect lines or conductive contact points or conductive vias in one or more layers, with points of electrical contact having been provided in or on the surface of said overlaying interconnecting metalization structure, at least one of said points of electrical contact making contact with at least one of said conductive interconnect lines or said conductive contact points or said conductive vias provided in said one or more layers of said overlaying interconnecting metalization structure, at least one of said metal lines or said contact points or said conductive vias making contact with at least one of said points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
a layer of passivation deposited over the surface of said one or more layers of interconnects;
passive components created on the surface of said passivation layer, creating a completed semiconductor device, said completed semiconductor device comprising at least one active semiconductor device created in or on the active surface of said substrate in addition having at least one electrical component overlying said at least one active semiconductor device, said completed semiconductor device being bounded by a first plane that is parallel with and located below the passive surface of said substrate, said first plane forming an interface between said unprocessed silicon of said substrate and said processed silicon of said substrate, further being bounded by a second plane that is parallel with said first plane and coincides with the surface of said passive components, further being bounded by a set of four planes that are perpendicular to the surface of said substrate;
a layer of adhesive material, having a surface, coated over the second surface of said completed semiconductor device;
said completed semiconductor device attached to a glass panel by pressing said surface of said adhesive layer against said glass panel;
said unprocessed silicon having been removed, starting at the passive surface of said substrate, to about said first plane of said completed semiconductor device, using methods of backside grinding or Chemical Mechanical Polishing (CMP); and
said unprocessed silicon having been removed from in between adjacent completed semiconductor devices, using methods of etching, said removal being bounded by said set of four planes bounding said completed semiconductor device. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 36, 39)
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28. A structure for reducing electromagnetic losses incurred by operational semiconductor devices or by thereto attached electrical components, said losses incurred in silicon that is in close physical proximity to said operational semiconductor devices or to said thereto attached electrical components, comprising:
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a semiconductor substrate, having a passive surface exposing unprocessed silicon in or on which no semiconductor devices have been created, further having an active surface exposing processed silicon in or on the surface of which semiconductor devices have been created, having points of electrical contact provided to said semiconductor devices in or on the active surface of said substrate;
a layer of passivation deposited over the surface of said semiconductor devices created in or on the active surface of said substrate;
components provided on the surface of said layer of passivation, creating a completed semiconductor device, said completed semiconductor device comprising at least one active semiconductor device created in or on the active surface of said substrate, in addition having at least one passive electrical components overlying said at least one active semiconductor device, said completed semiconductor device being bounded by a first plane that is parallel with and located below the passive surface of said substrate that forms an interface between said unprocessed silicon of said substrate and said processed silicon of said substrate, further being bounded by a second plane that is parallel with said first plane and coincides with the surface of said passive components, further being bounded by a set of four planes that are perpendicular to the surface of said substrate;
a layer of adhesive material, having a surface, coated over the surface of said components with;
said completed semiconductor device attached to a glass panel by pressing said surface of said adhesive layer against said glass panel;
said unprocessed silicon having been removed, starting at the passive surface of said substrate, to about said first plane of said completed semiconductor device, using methods of backside grinding or Chemical Mechanical Polishing (CMP); and
said unprocessed silicon having been removed from in between adjacent completed semiconductor devices, using methods of etching, said removal being bounded by said set of four planes bounding said completed semiconductor device. - View Dependent Claims (29, 30, 31, 32, 33, 34, 40)
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Specification