Video signal processing apparatus with time adjustment of digital chrominance signal

• US 6,400,412 B1
• Filed: 08/04/1998
• Issued: 06/04/2002
• Est. Priority Date: 08/22/1997
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Suzuki, Toshihiko
• Primary Examiner(s): HSIA, SHERRIE Y
• Application Number:
  US09/127,837
• Time in Patent Office: 1,400 Days
• Field of Search: H04/N.521, H04/N.514, H04/N.977, H04/N.964, 348/572, 348/575, 348/607, 348/608, 348/609, 348/624, 348/690, 348/689, 348/712, 348/713, 348/723, 348/725
• US Class Current: 348/572
• CPC Class Codes: H04N 5/64 Constructional details of receivers, e.g. cabinets or dust covers furniture aspects of television cabinets A47B81/06
• CPC Class Codes: H04N 9/77 Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase circuits for matrixing H04N9/67
• CPC Class Codes: H04N 9/804 involving pulse code modulation of the colour picture signal components

Abstract

A video signal processing apparatus having first and second analog/digital converters for converting imputted analog luminance and chrominance component signals into digital luminance and chrominance component signal. Frequency band limiting filters, disposed on a pre-stage of the first and second analog/digital converters, limit a frequency band of the analog luminance and chrominance component signals, the chrominance component signal frequency band limiting filter having a group delay characteristic different from a group delay characteristic of the luminance component signal frequency band limiting filter by a predetermined delay time. A time adjustment circuit adjusts the timing of the digital chrominance signal to match with the digital luminance signal.

Claims

1. A video signal processing apparatus comprising:

first frequency band limiting means for limiting a frequency band of an analog luminance component signal and outputting a frequency-band-limited analog luminance component signal;

second frequency band limiting means for limiting a frequency band of an analog chrominance component signal and outputting a frequency-band-limited analog chrominance component signal, said second frequency band limiting means having a group delay characteristic different from a group delay characteristic of said first frequency band limiting means;

first analog/digital conversion means for converting the frequency-band-limited analog luminance component signal into a first digital signal;

second analog/digital conversion means for converting the frequency-band-limited analog chrominance component signal into a second digital signal; and

,

timing adjustment means for adjusting a timing of the second digital signal to match with first digital signal.

2. A video signal processing apparatus according to claim 1, wherein said first analog/digital conversion means is arranged to convert in accordance with a sampling clock signal having a predetermined frequency, and also wherein said second analog/digital conversion means is arranged to convert in accordance with the sampling clock signal, and wherein a difference in delay time caused by a difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means is integer times a period of the sampling clock signal.

3. A video signal processing apparatus according to claim 2, wherein said timing adjustment means includes delay means having a delay time corresponding to integer times of the period of the sampling clock signal, for correcting the difference in delay time between the first digital signal and the second digital signal caused by the difference in group delay characteristic between said first frequency band limiting means and second frequency band limiting means.

4. A video signal processing apparatus according to claim 2, wherein said timing adjustment means includes a plurality of shift registers connected in series with each other and arranged to shift data in accordance with the sampling clock signal, for correcting the difference in delay time between the first digital signal and the second digital signal caused by the difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means.

5. A video signal processing apparatus according to claim 2, wherein said timing adjustment means includes a memory arranged to write and read data in accordance with the sampling clock signal, for correcting the difference in delay time between the first digital and the second digital signal caused by the difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means.

6. A video signal processing apparatus, comprising:

digital signal processing means for processing a digital chrominance component signal and outputting a processed digital chrominance component signal;

first digital/analog conversion means for converting a digital luminance component signal into an analog luminance component signal;

second digital/analog conversion means for converting the processed digital chrominance component signal into an analog chrominance component signal;

first frequency band ling means for limiting a frequency band of the analog luminance component signal and outputting a frequency band limited analog luminance component signal; and

,

second frequency band limiting means for limiting a frequency band of the analog chrominance component signal and outputting a frequency-band-limited analog chrominance component signal, said second frequency band limiting means having a group delay characteristic different from a group delay characteristic of said first frequency band limiting means;

wherein said digital signal processing means performs a predetermined process on the digital chrominance component signal so as to synchronize a timing of the frequency-band-limited analog chrominance component signal with a timing of the frequency-band-limited analog luminance component signal.

7. A video signal processing apparatus according to claim 6, wherein said first digital/analog conversion means is arranged to convert in accordance with a sampling clock signal having a predetermined frequency, and also wherein said second digital/analog conversion means is arranged to convert in accordance with the sampling clock signal, and wherein a difference in delay time caused by a difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means is an integer times a period of the sampling clock signal.

8. A video signal processing apparatus according to claim 7, wherein said digital signal processing means includes delay means having a delay time corresponding to integer times of the period of the sampling clock signal, for correcting the difference in delay time between the analog luminance component signal and the analog chrominance component signal caused by the difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means.

9. A video signal processing apparatus according to claim 7, wherein said digital signal processing means includes a plurality of shift registers connected in series with each other and arranged to shift data in accordance with the sampling clock signal, for correcting the difference in delay time between the analog luminance component signal and the analog chrominance component signal caused by the difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means.

10. A video signal processing apparatus according to claim 6, wherein said first digital/analog conversion means is arranged to convert in accordance with a first sampling clock signal having a predetermined frequency, and wherein said second digital/analog conversion means is arranged to convert in accordance with a second sampling clock signal having a predetermined frequency different from the first sampling clock signal, and wherein a difference in delay time caused by a difference in group delay characteristic between said first frequency band limiting means and said second frequency band limiting means is integer times a period of the second sampling clock signal.