Motor and disk drive apparatus

• US 6,404,153 B2
• Filed: 12/06/2000
• Issued: 06/11/2002
• Est. Priority Date: 12/06/1999
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Gotou, Makoto
• Primary Examiner(s): Dang, Khanh
• Application Number:
  US09/731,196
• Publication Number:
  US 20010002785A1
• Time in Patent Office: 552 Days
• Field of Search: 318/254, 318/138, 318/431, 318/599, 388/254, 388/804
• US Class Current: 318/400.01
• CPC Class Codes: H02P 6/085 in a bridge configuration

Abstract

In a motor and a disk drive apparatus using the motor, a switching control part produces a PWM pulse signal in response to the comparison result between a current detected signal and a command signal. An activate control part determines the active periods of power transistors in response to the holding state of the state holding part, and performs high-frequency switching operation to turn ON/OFF the power transistors in response to the PWM pulse signal of the switching control part. Furthermore, a voltage detecting part stops the detection of terminal voltages for a predetermined time in response to the PWM operation by the switching control part. After the stop, the voltage detecting part resumes the detection of the terminal voltages. This prevents improper detection caused by PWM noise.

Claims

1. A motor comprising:

a rotor which has a field part generating field fluxes;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means which includes two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees,

said switching operation means produces a switching pulse signal responding with said command signal, and makes high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal, and

said voltage detecting means stops detecting of said detected pulse signal during at least one of a first stop period including a changing timing from OFF to ON of said at least one power transistor and a second stop period including another changing timing from ON to OFF of said at least one power transistor, and executes detecting of said detected pulse signal during at least ON period of said at least one power transistor excluding said at least one of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.

2. The motor in accordance with claim 1, wherein

said voltage detecting means stops detecting of said detected pulse signal during both of said first stop period and said second stop period, and executes detecting of said detected pulse signal during a rest period excluding said both of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.

3. The motor in accordance with claim 1, wherein

said voltage detecting means includes:

voltage comparing means for producing an output signal responding with comparison result of terminal voltages of said Q-phase windings, and

noise eliminating means for gating the output signal of said voltage comparing means with a noise eliminating signal responding or corresponding with said switching pulse signal, so as not to pass the output signal of said voltage comparing means during at least one of a first period including a changing timing from OFF to ON of said switching pulse signal and a second period including another changing timing from ON to OFF of said switching pulse signal.

4. The motor in accordance with claim 3, wherein

said voltage detecting means further includes:

pulse producing means having a flip-flop circuit for changing a state of said flip-flop circuit with an rising or falling edge of an output signal of said noise eliminating means and producing said detected pulse signal responding with the state of said flip-flop circuit.

5. The motor in accordance with claim 1, wherein

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time.

6. The motor in accordance with the claim 5, wherein

said state shifting means produces said first adjust time and said second adjust time substantially proportional to an interval of said detected pulse signal.

7. The motor in accordance with claim 5, wherein

said voltage detecting means stops detecting of said detected pulse signal from a pulse timing of said detected pulse signal to a third adjust time, said third adjust time being larger than said second adjust time and substantially proportional to an interval of said detected pulse signal.

8. The motor in accordance with claim 1, wherein

said switching operation means includes:

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing said switching pulse signal responding with the comparison result.

9. The motor in accordance with claim 1, wherein

said switching operation means causes at least one first power transistor of said Q first power transistors to perform an ON-OFF high-frequency switching operation, and causes at least one second power transistor of said Q second power transistors in the same phase to perform an OFF-ON high-frequency switching operation opposite to the ON-OFF high-frequency switching operation of said at least one first power transistor.

10. The motor in accordance with claim 1, further comprising

commanding means for producing said command signal responding with an output pulse signal of said voltage detecting means.

11. A motor comprising:

a rotor which has a field part generating field fluxes;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means which includes two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees,

said switching operation means produces a switching pulse signal responding with said command signal, and makes high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal, and

said voltage detecting means includes;

voltage comparing means for producing an output signal responding with comparison result of terminal voltages of said Q-phase windings, and

noise eliminating means for gating said output signal of said voltage comparing means with a noise eliminating signal responding or corresponding with said switching pulse signal, so as not to pass the output signal of said voltage comparing means during at least one of a first period including a changing timing from OFF to ON of said switching pulse signal and a second period including another changing timing from ON to OFF of said switching pulse signal.

12. The motor in accordance with claim 11, wherein

said voltage detecting means further includes:

pulse producing means having a flip-flop circuit for changing a state of said flip-flop circuit with an rising or falling edge of an output signal of said noise eliminating means and producing said detected pulse signal responding with the state of said flip-flop circuit.

13. The motor in accordance with claim 11, wherein

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time, and

said first adjust time and said second adjust time are substantially proportional to an interval of said detected pulse signal.

14. The motor in accordance with claim 11, wherein

said voltage detecting means stops detecting of said detected pulse signal from a pulse timing of said detected pulse signal to a delayed timing.

15. The motor in accordance with claim 11, wherein

said switching operation means includes:

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing said switching pulse signal responding with the comparison result.

16. The motor in accordance with claim 11, further comprising

commanding means for producing said command signal responding with an output pulse signal of said voltage detecting means.

17. A motor comprising:

a rotor which has a field part generating field fluxes;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means which includes two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time,

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees, and

said switching operation means includes;

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing a switching pulse signal responding with the comparison result, thereby making high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal.

18. The motor in accordance with claim 17, wherein

said state shifting means produces said first adjust time and said second adjust time substantially proportional to an interval of said detected pulse signal.

19. The motor in accordance with claim 17, wherein

said voltage detecting means stops detecting of said detected pulse signal during at least one of a first stop period including a changing timing from OFF to ON of said at least one power transistor and a second stop period including another changing timing from ON to OFF of said at least one power transistor, and executes detecting of said detected pulse signal during at least ON period of said at least one power transistor excluding said at least one of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.

20. A disk drive apparatus comprising:

a head for at least reproducing a signal from a disk or recording a signal on a disk;

processing means for at least processing an output signal from said head and outputting a reproducing information signal, or processing a recording information signal and outputting a signal into said head;

a rotor which has a field part generating field fluxes, and directly drives said disk;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means which include two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees,

said switching operation means produces a switching pulse signal responding with said command signal, and makes high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal, and

said voltage detecting means stops detecting of said detected pulse signal during at least one of a first stop period including a changing timing from OFF to ON of said at least one power transistor and a second stop period including another changing timing from ON to OFF of said at least one power transistor, and executes detecting of said detected pulse signal during at least ON period of said at least one power transistor excluding said at least one of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.

21. The disk drive apparatus in accordance with claim 20, wherein

said voltage detecting means stops detecting of said detected pulse signal during both of said first stop period and said second stop period, and executes detecting of said detected pulse signal during a rest period excluding said both of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.

22. The disk drive apparatus in accordance with claim 20, wherein

said voltage detecting means includes:

voltage comparing means for producing an output signal responding with comparison result of terminal voltages of said Q-phase windings, and

noise eliminating means for gating the output signal of said voltage comparing means with a noise eliminating signal responding or corresponding with said switching pulse signal, so as not to pass the output signal of said voltage comparing means during at least one of a first period including a changing timing from OFF to ON of said switching pulse signal and a second period including another changing timing from ON to OFF of said switching pulse signal.

23. The disk drive apparatus in accordance with claim 22, wherein

said voltage detecting means further includes:

pulse producing means having a flip-flop circuit for changing a state of said flip-flop circuit with an rising or falling edge of an output signal of said noise eliminating means and producing said detected pulse signal responding with the state of said flip-flop circuit.

24. The disk drive apparatus in accordance with claim 20, wherein

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time.

25. The disk drive apparatus in accordance with the claim 24, wherein

said state shifting means produces said first adjust time and said second adjust time substantially proportional to an interval of said detected pulse signal.

26. The disk drive apparatus in accordance with claim 24, wherein

said voltage detecting means stops detecting of said detected pulse signal from a pulse timing of said detected pulse signal to a third adjust time, said third adjust time being larger than said second adjust time and substantially proportional to an interval of said detected pulse signal.

27. The disk drive apparatus in accordance with claim 20, wherein

said switching operation means includes:

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing said switching pulse signal responding with the comparison result.

28. The disk drive apparatus in accordance with claim 20, wherein

said switching operation means causes at least one first power transistor of said Q first power transistors to perform an ON-OFF high-frequency switching operation, and causes at least one second power transistor of said Q second power transistors in the same phase to perform an OFF-ON high-frequency switching operation opposite to the ON-OFF high-frequency switching operation of said at least one first power transistor.

29. The disk drive apparatus in accordance with claim 20, further comprising

commanding means for producing said command signal responding with an output pulse signal of said voltage detecting means.

30. A disk drive apparatus comprising:

a head for at least reproducing a signal from a disk or recording a signal on a disk;

processing means for at least processing an output signal from said head and outputting a reproducing information signal, or processing a recording information signal and outputting a signal into said head;

a rotor which has a field part generating field fluxes, and directly drives said disk;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means which includes two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees,

said switching operation means produces a switching pulse signal responding with said command signal, and makes high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal, and

said voltage detecting means includes;

voltage comparing means for producing an output signal responding with comparison result of terminal voltages of said Q-phase windings, and

noise eliminating means for gating said output signal of said voltage comparing means with a noise eliminating signal responding or corresponding with said switching pulse signal, so as not to pass the output signal of said voltage comparing means during at least one of a first period including a changing timing from OFF to ON of said switching pulse signal and a second period including another changing timing from ON to OFF of said switching pulse signal.

31. The disk drive apparatus in accordance with claim 30, wherein

said voltage detecting means further includes:

pulse producing means having a flip-flop circuit for changing a state of said flip-flop circuit with an rising or falling edge of an output signal of said noise eliminating means and producing said detected pulse signal responding with the state of said flip-flop circuit.

32. The disk drive apparatus in accordance with claim 30, wherein

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time, and

said first adjust time and said second adjust time are proportional to an interval of said detected pulse signal.

33. The disk drive apparatus in accordance with claim 30, wherein

said voltage detecting means stops detecting of said detected pulse signal from a pulse timing of said detected pulse signal to a delayed timing.

34. The disk drive apparatus in accordance with claim 30, wherein

said switching operation means includes:

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing said switching pulse signal responding with the comparison result.

35. The disk drive apparatus in accordance with claim 30, further comprising

commanding means for producing said command signal responding with an output pulse signal of said voltage detecting means.

36. A disk drive apparatus comprising:

a head for at least reproducing a signal from a disk or recording a signal on a disk;

processing means for at least processing an output signal from said head and outputting a reproducing information signal, or processing a recording information signal and outputting a signal into said head;

a rotor, which has a field part generating field fluxes, and directly drives said disk;

Q-phase windings (Q is an integer of 3 or more);

voltage supplying means, which includes two output terminals for supplying a DC voltage;

power supplying means having Q first power transistors and Q second power transistors for supplying a power to said Q-phase windings, each of said Q first power transistors forming a current path between one output terminal side of said voltage supplying means and one of said Q-phase windings, and each of said Q second power transistors forming a current path between the other output terminal side of said voltage supplying means and one of said Q-phase windings;

voltage detecting means for producing a detected pulse signal;

state shifting means for shifting a holding state from one state to at least one other state in sequence responding with the detected pulse signal of said voltage detecting means;

activation control means for controlling active periods of said Q first power transistors and said Q second power transistors responding with said holding state; and

switching operation means for causing at least one of said Q first power transistors and said Q second power transistors to perform high-frequency switching corresponding to a command signal;

and that

said state shifting means shifts said holding state from a first state to a second state after a first adjust time from detection of said detected pulse signal, and further shifts said holding state from said second state to a third state after a second adjust time from detection of said detected pulse signal, said second adjust time being larger than said first adjust time,

said activation control means produces Q-phase first activation control signals and Q-phase second activation control signals responding with said holding state of said state shifting means for controlling said active periods of said Q first power transistors and said Q second power transistors, each of said active periods being an electrical angle larger than 360/Q degrees, and

said switching operation means includes;

current detecting means for producing a current detected signal responding with or corresponding to a current from said voltage supplying means to said Q-phase windings, and

switching control means for comparing an output signal of said current detecting means with said command signal and producing a switching pulse signal responding with the comparison result, thereby making high-frequency switching operation of at least one power transistor among said Q first power transistors and said Q second power transistors responding with said switching pulse signal.

37. The disk drive apparatus in accordance with claim 36, wherein

said state shifting means produces said first adjust time and said second adjust time substantially proportional to an interval of said detected pulse signal.

38. The disk drive apparatus in accordance with claim 36, wherein

said voltage detecting means stops detecting of said detected pulse signal during at least one of a first stop period including a changing timing from OFF to ON of said at least one power transistor and a second stop period including another changing timing from ON to OFF of said at least one power transistor, and executes detecting of said detected pulse signal during at least ON period of said at least one power transistor excluding said at least one of said first stop period and said second stop period, thereby producing said detected pulse signal responding with terminal voltages of said Q-phase windings.