Gm-C tuning circuit with filter configuration

• US 6,404,277 B1
• Filed: 11/13/2000
• Issued: 06/11/2002
• Est. Priority Date: 07/24/1998
• Status: Expired due to Term

• Current Assignee: GCT Semiconductor Incorporated
• Original Assignee: GCT Semiconductor Incorporated
• Inventors: Jeong, Deog-Kyoon, Lee, Kyeongho
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US09/709,310
• Time in Patent Office: 575 Days
• Field of Search: 327/552, 327/553, 327/558, 327/559, 327/156, 330/305
• US Class Current: 327/553
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03H 11/22 providing two or more phase shifted output signals, e.g. n-phase output
• CPC Class Codes: H03H 2011/0494 Complex filters
• CPC Class Codes: H03K 9/00 Demodulating pulses which have been modulated with a continuously-variable signal
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/1974 for fractional frequency division
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 1/403 using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency

Abstract

A tuning circuit for an RF communications system and method includes a master block that outputs a control signal to a slave block. The master block can include a first filter having a high pass filter and a low pass filter that each receive the control signal, a first rectifier coupled to the high pass filter, a second rectifier coupled to the low pass filter, and a converter coupled to the first and second rectifiers that outputs the control signal. The first filter is preferably a gm-C poly-phase filter. Output signals of the gm-C poly-phase filter include high and low pass filtering signals resulting from similarly configured circuits so that the output signals have the same electrical characteristics, which results in an increased accuracy, for example, in a cut-off frequency.

Claims

1. A tuning circuit, comprising:

a slave filter block that receives a first control signal and outputs a second control signal; and

a master filter block that receives first and second reference signals and outputs the first control signal to the slave filter block, wherein the master filter block comprises,

a high pass filter and a low pass filter, wherein each of the high and low pass filters receives the first control signal,

a first rectifier coupled to the high pass filter,

a second rectifier coupled to the low pass filter, and

a converter coupled to the first and second rectifiers that outputs the first control signal.

2. The tuning circuit of claim 1, wherein as a value of the first control signal increases, a first amplitude of an output signal of the high pass filter decreases and a second amplitude of an output signal of the low pass filter increases.

3. The tuning circuit of claim 2, wherein the value of the first control signal is adjusted until the first amplitude and the second amplitude are substantially equal.

4. The tuning circuit of claim 1, wherein the high pass filter includes first and second transconductance amplifiers (TA) coupled in series to output a first pair of output signals at first and second output terminals, and wherein the low pass filter includes third and fourth transconductance amplifiers (TA) coupled in series to output a second pair of output signals at third and fourth output terminals.

5. The tuning circuit of claim 4, wherein first and second inputs of the first TA receives the first reference signal, and wherein a first output of the second TA is coupled to the second output terminal, a second output of the first TA and a second input of the second TA, and wherein a second output of the second TA is coupled to a first output terminal, a first output of the first TA and a first input of the second TA.

6. The tuning circuit of claim 5, wherein the first and second inputs of the third TA receives the second reference signal, wherein a first output of the fourth TA is coupled to the fourth output terminal, a second output of the third TA and a second input of the fourth TA, and wherein a second output of the fourth TA is coupled to the third output terminal, a first output of the third TA and a first input of the fourth TA.

7. The tuning circuit of claim 6, wherein a control terminal of the first through fourth TAs receives the first control signal.

8. The tuning circuit of claim 7, further comprising:

first and second capacitors coupled between the first and second output terminals and the second reference signal; and

third and fourth capacitors coupled between the third and fourth output terminals and a first prescribed reference voltage, respectively.

9. The tuning circuit of claim 1, wherein the first rectifier comprises:

first and second transistors coupled between a first node and a first prescribed voltage level;

a third transistor coupled between a second prescribed voltage level and the first node;

fourth and fifth transistors coupled in series at a second node between the second prescribed voltage level and the first prescribed voltage level; and

an operational amplifier having first and second inputs respectively coupled to the first and second nodes and an output coupled to a control electrode of the fifth transistor, wherein a control electrode of the third and fourth transistors receives a third prescribed voltage, and wherein control electrodes of the first and second transistors receives first and second input signals, respectively.

10. The tuning circuit of claim 1, wherein the converter is a voltage-to-current converter comprising:

first and second transistors coupled in series between a second prescribed voltage and a first prescribed voltage;

third and fourth transistors coupled in series at an output terminal of the converter between the second prescribed voltage and the first prescribed voltage;

fifth and sixth transistors coupled in series between the second prescribed voltage and a first node;

seventh and eighth transistors coupled in series between the second prescribed voltage and the first node; and

a current source coupled between the first node and the first prescribed voltage.

11. The tuning circuit of claim 1, wherein the first reference signal is a DC voltage and the second reference signal is a sine wave.

12. The tuning circuit of claim 11, wherein the sine wave is a 4 MHz sine wave.

13. The tuning circuit of claim 4, wherein the rectifiers operate to allow comparison of the first and second pairs of output signals in the converter.

14. A receiver for an RF communications system, comprising:

an RF section coupled to receive an input RF signal;

a baseband section coupled to the RF section to receive corresponding baseband input signals from the RF section and to output baseband output signals;

a phase locked loop coupled to the RF section; and

a tuning circuit that outputs a first control signal to the baseband section, wherein the tuning circuit includes,

a master block comprising,

a first high pass filter and a first low pass filter, wherein each of the first high and low pass filters receive a second control signal,

a first rectifier coupled to the first high pass filter,

a second rectifier coupled to the first low pass filter, and

a first converter coupled to the first and second rectifiers that outputs the second control signal to the first high and low pass filters, and

a slave block comprising,

a second high pass filter and a second low pass filter, wherein each of the second high and low pass filters receive the second control signal,

a third rectifier coupled to the second high pass filter,

a fourth rectifier coupled to the second low pass filter, and

a second converter coupled to the third and fourth rectifiers that outputs the first control signal to the baseband section.

15. A tuning circuit, comprising:

slave filtering means for receiving a first control signal and outputting a second control signal; and

master filtering means for receiving a first and a second prescribed reference signal and outputting the first control signal to the slave filtering means, wherein the master filtering means comprises;

high pass filtering means and a low pass filtering means for filtering the first and second prescribed reference signals, wherein each of the high and low pass filtering means receives the first control signal,

first rectifying means coupled to the high pass filtering means,

second rectifying means coupled to the low pass filtering means, and

converting means coupled to the first and second rectifying means for outputting the first control signal.

16. The tuning circuit of claim 15, wherein as a value of the first control signal decreases, a first amplitude of an output signal of the high pass filtering means increases and a second amplitude of an output signal of the low pass filtering means decreases.

17. The tuning circuit of claim 16, wherein the value of the first control signal is adjusted until the first amplitude and the second amplitude are substantially equal.

18. The tuning circuit of claim 15, wherein the high pass filtering means includes first and second transconductance amplifiers (TA) coupled in series to output a first pair of output signals at first and second output terminals, and wherein the low pass filtering means includes third and fourth transconductance amplifiers (TA) coupled in series to output a second pair of output signals at third and fourth output terminals.

19. The tuning circuit of claim 18, wherein the first rectifying means comprises:

first and second transistors coupled between a first node and a first prescribed voltage level;

a third transistor coupled between a second prescribed voltage level and the first node;

fourth and fifth transistors coupled in series at a second node between the second prescribed voltage level and the first prescribed voltage level; and

an operational amplifier having first and second inputs respectively coupled to the first and second nodes and an output coupled to a control electrode of the fifth transistor, wherein a control electrode of the third and fourth transistors receives a third prescribed voltage, and wherein control electrodes of the first and second transistors receive first and second input signals, respectively.

20. The tuning circuit of claim 18, wherein the converter means is a voltage-to-current converter comprising:

first and second transistors coupled in series between a second prescribed voltage and a first prescribed voltage;

third and fourth transistors coupled in series at an output terminal of the converter means between the second prescribed voltage and the first prescribed voltage;

fifth and sixth transistors coupled in series between the second prescribed voltage and a first node;

seventh and eighth transistors coupled in series between the second prescribed voltage and the first node; and

a current source coupled between the first node and the first prescribed voltage.