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Memory compiler interface and methodology

  • US 6,405,160 B1
  • Filed: 08/03/1998
  • Issued: 06/11/2002
  • Est. Priority Date: 08/03/1998
  • Status: Expired due to Fees
First Claim
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1. A memory compiler methodology including a stand alone interface through which an user may specify a certain type of memory device of specific requirements and which will provide the user a menu listing several options of such memory device that meets the user'"'"'s requirement based on a precharacterization of all valid configurations of the type of memory device architecture, comprising the steps of:

  • 1) initially designing a baseline configuration for the memory device architecture from which the user may specify a memory device, including the substeps of;

    a) generating the transistor level circuitry for the various circuit blocks comprising the baseline configuration;

    b) generating a physical layout and X-Y coordinates to predetermined critical features of the physical layout for each of the various circuit blocks;

    c) converting the subsets 1a and 1b into computer code files;

    2) compiling all of the computer code files and verifying the functionality thereof across all architectural variables;

    3) selecting a small number of subsets of all possible configurations of the memory device;

    4) statistically analyzing each of the subsets to derive characteristic mathematical equations which represent key parameters and properties for all valid configurations of the memory device;

    5) compiling all of the mathematical equations into a computer code file; and

    6) providing the stand alone interface through which the user enters a requested memory device wherein the stand alone interface invokes the characteristic mathematical equations to provide the user the menu listing several configurations of the memory device which meets the user'"'"'s requirements.

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