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Selectively accessible memory banks for operating in alternately reading or writing modes of operation

  • US 6,405,293 B1
  • Filed: 03/21/2000
  • Issued: 06/11/2002
  • Est. Priority Date: 03/21/2000
  • Status: Expired due to Fees
First Claim
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1. A selectively accessible memory for reading and writing data comprising:

  • a) a first memory bank accessible for reading and writing data, b) a second memory bank accessible for reading and writing data, c) a first interface terminal selectively connectable to the first and second memory banks, d) a second interface terminal selectively connectable to the first and second memory banks, and e) multiplexer circuitry for selectively connecting the first interface terminal and a second interface terminal to the first and second memory banks for alternately reading and writing data in the first and second memory banks, the multiplexer circuitry comprising a first multiplexer for selectively connecting the first interface terminal and the second interface terminal to an input to the first memory bank, a second multiplexer for selectively connecting the first interface terminal and the second interface terminal to an input to the second memory bank, a third multiplexer for selectively connecting data outputs from the first memory bank and the second memory bank to the first terminal, and a fourth multiplexer for connecting data outputs from the first memory bank and the second memory bank to the second interface terminal.

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