Computer system performing machine specific tasks before going to a low power state

• US 6,405,320 B1
• Filed: 11/11/1998
• Issued: 06/11/2002
• Est. Priority Date: 07/07/1998
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Wang, Lan, Lee, Woon Jeong
• Primary Examiner(s): Wiley, David
• Assistant Examiner(s): Jean, Frantz B.
• Application Number:
  US09/189,225
• Time in Patent Office: 1,308 Days
• Field of Search: 713/300, 713/323, 713/324, 713/340, 713/400, 327/276
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

A computer system having an Advance Configuration and Power Interface-compliant, or ACPI, operating system performs certain machine specific tasks before going to a low power state. When the computer operating system indicates that entry into the low power state is desired, a microcontroller embedded in an input/output chip is alerted. Synchronization between the main processor of the computer system and the embedded microcontroller of the ACPI operating system is achieved, reducing the likelihood of system failure on the next boot operation. The embedded microcontroller then also causes the state of devices connected to the input/output chip to be saved. This helps the machine to go to a known state during the resume process.

Claims

1. A computer system comprising:

a processor under control of an operating system and a basic input/output system (BIOS), the processor having a plurality of processor power states;

a microcontroller, the microcontroller having a plurality of microcontroller power states; and

a memory device storing the BIOS for the processor, the BIOS comprising;

code to receive a request to transition the processor to a different one of the plurality of processor power states;

code to notify the microcontroller of the request;

code to receive an acknowledgment of the request from the microcontroller; and

code to cause the processor to transition to the different one of the plurality of power states responsive to the acknowledgment.

2. The computer system of claim 1, the microcontroller adapted to transition to a different power state of the plurality of microcontroller power states corresponding to the different one of the plurality of processor power states responsive to the code to notify the microcontroller.

3. The computer system of claim 1, wherein the processor and its operating system are effectively compliant with the Advanced Configuration and Power Interface (ACPI) specification and the microcontroller is not compliant with the ACPI specification.

4. The computer system of claim 1, further comprising:

at least one peripheral device operating under control of the operating system;

the BIOS further comprising;

code to notify the peripheral device to perform a custodial function responsive to the request.

5. The computer system of claim 1, further comprising:

a first power management control register adapted to store the current power state of the processor; and

a second power management control register adapted to store the current power state of the microcontroller.

6. computer system comprising:

a processor under control of an operating system and a basic input/output system (BIOS), the processor having a plurality of processor power states;

at least one peripheral device operating under control of the operating system;

a memory device storing the BIOS for the processor, the BIOS comprising;

code to receive a request to transition the processor to a different one of the plurality of processor power states; and

code to notify the peripheral device to perform a custodial function responsive to the request.

7. The computer system of claim 6, further comprising:

a microcontroller coupled to the processor, the microcontroller adapted to perform the custodial function responsive to the code to notify the peripheral device.

8. The computer system of claim 7,

wherein the microcontroller is wake-enabled, and

wherein the custodial function comprises:

enabling the wake-enabled microcontroller.

9. The computer system of claim 6, wherein the custodial function comprises:

storing data.

10. The computer system of claim 6, wherein the custodial function comprises:

storing clock.

11. The computer system of claim 6, wherein the custodial function comprises:

unloading applications.

12. The computer system of claim 6, wherein the custodial function comprises:

closing files.

13. A method of synchronizing power states in a computer system having a microcontroller and a processor under control of an operating system and a basic input/output system (BIOS), the processor having a plurality of processor power states, the microcontroller having a plurality of microcontroller power states, a method comprising the steps of:

detecting a command to transition the processor to a different one of the plurality of processor power states;

notifying the microcontroller of the command; and

transitioning the microcontroller to a different one of the plurality of microcontroller power states corresponding to the different one of the plurality of processor power states.

14. The method of claim 13, wherein the computer system has at least one peripheral device, the method further comprising the step of:

notifying the peripheral device to perform a custodial function.

15. In a computer system having a microcontroller and a processor under control of an operating system and a basic input/output system (BIOS), the processor having a plurality of processor power states, the microcontroller having a plurality of microcontroller power states, a memory device containing BIOS code causing the computer system to perform the steps of:

detecting a command to transition the processor to a different one of the plurality of processor power states;

notifying the microcontroller of the command; and

transitioning the processor to the different one of the plurality of processor power states responsive to an acknowledgment by the microcontroller to the step of notifying the microcontroller.

16. The memory device of claim 15, wherein the memory device further contains BIOS code causing the computer system to perform the step of:

transitioning the microcontroller to a different one of the plurality of microcontroller power states corresponding to the different one of the plurality of processor power states.

17. The memory device of claim 16, the step of transitioning the microcontroller comprising the step of:

shutting down the microcontroller.

18. The memory device of claim 15, wherein the computer system includes at least one peripheral device, and wherein the memory device further contains BIOS code causing the computer system to perform the step of:

notifying the peripheral device to perform a custodial function.