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Defect management for interface to electrically-erasable programmable read-only memory

  • US 6,405,323 B1
  • Filed: 03/30/1999
  • Issued: 06/11/2002
  • Est. Priority Date: 03/30/1999
  • Status: Expired due to Term
First Claim
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1. A system to interface a host processor to an electrically-erasable memory in a memory space, the memory space defining a plurality of segments and each of the segments including a plurality of sectors, including:

  • media interface means that regulates access by the host processor to the electrically-erasable memory in the memory space;

    sector valid indication reading means to read at least one sector valid indication from a segment of the media;

    sector valid determination means to determine a non-defective sector from the at least one sector valid indication read;

    sector level segment defect map indication reading means to read a sector-level segment defect map from the sector determined to be non-defective;

    sector defect determination means to determine, from the sector-level segment defect map read, sectors within the segment that are valid;

    access regulation means to regulate access to the memory space at least in part on the determinations by the sector defect determination means.

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