Flip chip type semiconductor device and method for manufacturing the same

• US 6,406,942 B2
• Filed: 03/09/2001
• Issued: 06/18/2002
• Est. Priority Date: 03/09/2000
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Honda, Hirokazu
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): LATTIN, CHRISTOPHER W
• Application Number:
  US09/801,901
• Publication Number:
  US 20010020739A1
• Time in Patent Office: 466 Days
• Field of Search: 438/455, 438/459, 438/106, 438/107, 438/108, 438/118, 438/119, 438/121, 438/458
• US Class Current: 438/119
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01024 Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01042 Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/18161 : of a flip chip
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H05K 2201/09536 : Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/0959 : Plated through-holes or plated blind vias filled with insulating material
• CPC Class Codes: H05K 2201/10378 : Interposers
• CPC Class Codes: H05K 2203/0152 : Temporary metallic carrier, e.g. for transferring material affixing a prefabricated conductor pattern formed by electroplating or electroforming on a metallic carrier H05K3/205
• CPC Class Codes: H05K 2203/061 : of previously made multilayered subassemblies laminating only or mainly similar single-sided circuit boards H05K3/4617; laminating only or mainly similar double-sided circuit boards H05K3/462
• CPC Class Codes: H05K 2203/1581 : Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
• CPC Class Codes: H05K 3/4069 : for via connections in organic insulating substrates
• CPC Class Codes: H05K 3/4602 : characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
• CPC Class Codes: H05K 3/4682 : Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

Abstract

A multilayer wiring structure is formed on a flat metal plate and then an entire surface of the metal plate is etched away to thereby leave only a multilayer wiring layer. An insulating substrate having through hole sections is bonded to the multilayer wiring layer, a conductive bonding agent is embedded into the through hole section, a semiconductor chip is mounted and a solder ball is coupled.

Claims

1. A flip chip type semiconductor device manufacturing method, comprising the steps of:

forming a multilayer wiring structure on a first substrate consisting of a flat metal plate;

etching away said first substrate to form a second substrate consisting of a multilayer wiring layer;

coupling a third substrate to the second substrate consisting of said multilayer wiring layer to obtain a multilayer wiring substrate; and

mounting a semiconductor chip on said second substrate.

2. A flip chip type semiconductor device manufacturing method according to claim 1, wherein

said third substrate is one of an insulating substrate and a multilayer substrate, and provided with holes.

3. A flip chip type semiconductor device manufacturing method according to claim 1, wherein

said second substrate is formed by the steps of:

forming an external electrode pad on said first substrate;

forming an insulating thin film layer on an entire surface of said external electrode pad, and etching away said insulating thin film on said external electrode pad to form an opening;

forming a metal thin layer on an entire surface, and patterning said metal thin layer to form a metal thin film wiring section connected to said external electrode pad in said opening;

repeating formation of the insulating thin film layer and formation of the metal thin film wiring section; and

forming an insulating resin thin film layer on an entire surface, forming an opening on the metal thin film wiring section below the insulating resin thin film layer and forming a pad electrode in the opening.

4. A flip chip type semiconductor device manufacturing method according to claim 3, comprising the step of:

embedding a conductive bonding agent into the hole of said third substrate.

5. A flip chip type semiconductor device manufacturing method according to claim 4, comprising the step of:

coupling a solder ball onto said conductive bonding agent.

6. A flip chip type semiconductor device manufacturing method according to claim 5, wherein

said semiconductor chip has a bump electrode;

and

in a step of mounting said semiconductor chip, said bump electrode is coupled to the external electrode pad of said second substrate.

7. A flip chip type semiconductor device manufacturing method according to claim 1, comprising the step of:

coupling a radiator to a rear surface of said semiconductor chip through a heat transfer bonding agent.

8. A flip chip type semiconductor device manufacturing method according to claim 7, comprising the steps of:

coupling stiffeners on said second substrate at positions sandwiching said semiconductor chip; and

mounting said radiator on said semiconductor chip and said stiffener.