Circuit for attenuation of echos caused by line variations and an interfacing system for capacitively coupling a plurality of sources to a two-wire communication line

• US 6,408,008 B1
• Filed: 11/24/1999
• Issued: 06/18/2002
• Est. Priority Date: 04/06/1993
• Status: Expired due to Fees

• Current Assignee: Creative Integrated Systems Incorporated
• Original Assignee: Creative Integrated Systems Incorporated
• Inventors: Stockman, John F., Komarek, James A., Lewis, Harold F., Minney, Jack L., Nordine, Stephen P., Wada, Richard
• Primary Examiner(s): TON, DANG T
• Application Number:
  US09/449,713
• Time in Patent Office: 937 Days
• Field of Search: 370/319, 370/321, 370/324, 370/329, 370/330, 370/337, 370/336, 370/341, 370/346, 370/347, 370/350, 370/431, 370/451, 370/437, 370/458, 370/465, 370/489, 370/503, 379/410, 379/411, 379/408, 379/409, 379/43.17, 379/207, 379/219, 379/202, 379/225, 379/227, 379/230, 379/231, 379/235, 379/234, 379/247, 379/250, 379/93.04, 379/93.07, 379/93.14, 379/198, 379/215
• US Class Current: 370/458
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 7/10 Arrangements for initial synchronisation
• CPC Class Codes: H04M 1/715 using two or more extensions per line cordless telephones H04M1/725
• CPC Class Codes: H04M 19/005 Feeding arrangements without the use of line transformers
• CPC Class Codes: H04M 19/04 the ringing-current being generated at the substations
• CPC Class Codes: H04M 3/005 Interface circuits for subscriber lines current supply H04M19/00 and subgroups; supervisory, monitoring or testing arrangements H04M3/22 and subgroups; in key telephone systems H04M9/006
• CPC Class Codes: H04M 9/003 Transmission of control signals from or to the key telephone set; signalling equipment at key telephone set, e.g. keyboard or display equipment keyboard equipment in semi-automatic systems H04M3/62
• CPC Class Codes: H04M 9/005 with subscriber controlled access to an exchange line
• CPC Class Codes: H04M 9/02 involving a common line for all parties
• CPC Class Codes: H04M 9/025 Time division multiplex systems, e.g. loop systems
• CPC Class Codes: H04M 9/027 Frequency division multiplex systems

Abstract

A circuit attenuates echo caused by line variations and a transformerless, high DC impedance, two-wire line interface. To reduce echo, a test tone is introduced on the communication line with all station units connected to the line. The resultant receive signal is conditioned through a peak detector, digitized and read by a processor. The resistive and capacitive characteristics of a network are iterated by the processor and the results remeasured. The network is set to the best combination for least echo by the processor. An interfacing system capacitively couples a plurality of sources to a two-wire communication pair by means of a plurality of differential voltage-to-current amplifiers. Each source uses a differential receiving amplifier to receive signals from the line and is resistively coupled in parallel to all the sourcing entities coupled to the communication line at that particular interface. There is an echo balance network associated with each source.

Claims

1. A circuit for reducing echo back of transmitted signals on a communication line comprising:

a summing means coupled to said communication line for a bi-directional communication of signals therewith, said summing means having a summing node;

a balance network means for coupling a switch selected array of selectable impedances to said summing node; and

a processor means for receiving a signal from said summing node and for generating a control signal to said balance network means to select an impedance to be coupled to said summing node to reduce said signal received from said summing node by said processor means, said summing node having coupled thereto signals which are measures of the transmitted and received signals on said communication line;

whereby the echo back of a transmitted signal placed on said communication line is substantially reduced.

2. The circuit of claim 1 wherein said balance network means comprises a plurality of selectively switched impedance elements.

3. The circuit of claim 2 wherein said switched impedance elements are comprised of a plurality of switch selectable capacitive elements and switch selectable resistive elements.

4. The circuit of claim 3 wherein said switch selectable resistive elements comprises a switched capacitor equivalent of resistors.

5. The circuit of claim 1 wherein said processor means comprises:

a peak detector means for generating a constant analog voltage corresponding to an amplified signal from said summing node and from said echo back of transmitted signals from said communication line;

an analog-to-digital converter for converting said constant analog voltage to a digital number; and

a digital processor for receiving said digital number and generating control signals to be coupled to said balance network means for altering said impedance of said balance network means to minimize said echo back signal.

6. The circuit of claim 1 further comprising an analog test tone signal generation means for selectively coupling a predetermined test tone onto said communication line and into said summing node to generate and measure from said communication line said echo back signals coupled to said summing node.

7. The circuit of claim 1 further comprising a remote station unit coupled to said communication line, and a control unit communicating with said station unit across said communication line, said station unit similarly being provided with a summing means and balance network means, said processor means corresponding to said control unit for further remotely communicating control signals to said balance network means corresponding to said remote station unit to substantially reduce said echo back of transmitted signals at said station unit as determined by optimal reduction of said echo back of transmitted signals by said processor means and corresponding balance network means at said control unit.

8. A system for coupling signals on a two-wire communication line to a plurality of sources/receivers comprising:

a plurality of voltage-to-current amplifiers, each capacitively coupled to said communication line, said voltage-to-current amplifier for transmitting between one of said plurality of sources/receivers and said communication line;

wherein each said voltage-to-current amplifier comprises two differential amplifiers, each differential amplifier having an output capacitively coupled to one wire of said two-wire communication line comprising said two-wire communication line, one of said two differential amplifiers being operated as a current source into ground and the other one of said differential amplifiers being operated as a current source from ground and both operating in a complementary fashion to each other relative to signals on said two-wire communication line; and

capacitive means for providing high impedance coupling between said plurality of voltage-to-current amplifiers and said communication line;

whereby said plurality of sources/receivers are coupled to said communication line without being characterized by mutual inductance, leakage inductance, inherent resonance, nonlinearlity of magnetic media, or a winding resistance characteristic of transformer coupling.

9. The system of claim 8 further comprising a differential receiving amplifier having two inputs, each of said inputs being RC coupled to one of said two lines of said two-wire communication line, said RC coupled differential amplifier having an output characterized by substantial common mode rejection of signals received by said two-wire communication line.

10. The system of claim 9 further comprising a plurality of echo balance means for canceling echo back signals and wherein said RC coupled differential amplifier has its output coupled to each of said echo balance means, one of said echo balance means being provided for each of said voltage-to-current amplifiers so that the echo back signal for each source/receiver is substantially reduced.

11. The system of claim 8 further comprising a balanced DC load means comprised of a plurality of high impedance balanced DC loads at each transmitting/receiving station interface for allowing line powering over said communication line without substantially lowering the AC impedance of each said voltage-to-current amplifier and without disturbing signal current information.

12. The system of claim 8 further comprising a single low impedance capacitively coupled balanced load ground means for setting a ground reference while maintaining high impedance of said communication line and to allow said plurality of voltage-to-current amplifiers to be coupled to said communication line without significantly lowering the impedance of said communication line.