Integrated circuit device having C4 and wire bond connections

• US 6,410,990 B2
• Filed: 12/12/1997
• Issued: 06/25/2002
• Est. Priority Date: 12/12/1997
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Taylor, Gregory F., Geannopoulos, George L.
• Primary Examiner(s): Loke, Steven
• Assistant Examiner(s): VU, HUNG K
• Application Number:
  US08/989,946
• Publication Number:
  US 20010013663A1
• Time in Patent Office: 1,656 Days
• Field of Search: 257/203, 257/207, 257/208, 257/210, 257/778, 257/779, 257/780, 257/781, 257/786, 257/690, 257/691, 257/693, 257/734, 257/737, 257/738, 257/692, 361/767, 361/777, 361/808, 438/108, 438/128, 438/129, 438/612, 438/613, 438/614, 438/666
• US Class Current: 257/786
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01077 Iridium [Ir]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15312 being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/1532 the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H01L 2924/30107 Inductance

Abstract

An integrated circuit having a first plurality of wire bond pads located along a horizontal axis, a second plurality of wire bond pads located along a vertical axis, and a plurality of C4 pads arranged in a grid array wherein each grid is defined by the intersection of one of the first wire bond pads and one of the second wire bond pads.

Claims

1. An integrated circuit comprising:

a first plirality of wire bond pads located along a horizontal axis, said first wire bond pads comprising power connections, ground connections and input/output (I/O) connections;

a second plurality of wire bond pads located along a vertical axis, said second wire bond pads comprising power connections, ground connections and I/O connections; and

a plurality of C4 pads arranged in a grid array, each grid defined by the intersection of one of said first wire bond pads and one of said second wire bond pads, and wherein the nearest adjoining C4 pads are located diagonal to one another, said C4 pads comprising power connections, ground connections and I/O connections, said C4 power connections being divided into a first set of vertical rows and electrically coupled to form a plurality of power buses, said C4 ground connections being divided into a second set of vertical rows to form a plurality of ground buses, each of said ground buses being located adjacent one of said power buses and at least one of said second wire bond pad power connections being coupled to one of said power buses along a trace coupling two of said C4 power connections.

2. The integrated circuit of claim 1 wherein said wire bond pads and said C4 pads are for electrically coupling to a package being coupled to said integrated circuit.