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Bias stabilizer circuit and method of operation

  • US 6,411,154 B1
  • Filed: 02/20/2001
  • Issued: 06/25/2002
  • Est. Priority Date: 02/20/2001
  • Status: Expired due to Term
First Claim
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1. A bias circuit for biasing an external transistor, the bias circuit comprising:

  • a first bipolar junction transistor (BJT) having a first base-emitter junction voltage with a first temperature coefficient, and a first collector through which a first collector current flows;

    a second BJT having a second base emitter junction voltage with a second temperature coefficient that is approximately equal to the first temperature coefficient, and a second collector through which a second collector current flows, wherein the second collector current is a duplicated version of the first collector current; and

    a voltage divider circuit, coupled to divide a voltage at the second collector to provide a biasing voltage to a first base of the first BJT that has a third temperature coefficient with an opposite sign and a same magnitude as the first temperature coefficient.

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