Active matrix substrate and producing method of the same

• US 6,411,348 B2
• Filed: 06/26/1997
• Issued: 06/25/2002
• Est. Priority Date: 07/02/1996
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Okamoto, Masaya, Kawai, Katsuhiro, Shimada, Takayuki, Yamakawa, Shinya, Katayama, Mikio
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): Duong, Tai V.
• Application Number:
  US08/883,593
• Publication Number:
  US 20010045996A1
• Time in Patent Office: 1,825 Days
• Field of Search: 349/50, 349/40, 349/43, 349/54, 349/139, 361/56, 361/91, 361/111, 257/356, 257/59, 257/72
• US Class Current: 349/40
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures

Abstract

An active matrix is furnished with an insulating substrate; a plurality of scanning lines and signal lines provided on the insulating substrate in a matrix pattern; pixel electrodes provided in areas enclosed by the scanning lines and signal lines, respectively; switching elements electrically connected to the scanning lines, signal lines, and pixel electrodes, respectively; a resistance control element for electrically connecting two lines selected arbitrary from the scanning lines and signal lines while controlling its own resistance value in response to a voltage applied thereto. According to the above arrangement, it has become possible to increase a margin of the active matrix substrate for the static electricity and improve the production yield without increasing the number of the producing steps.

Claims

1. An active matrix substrate comprising:

an insulating substrate;

a plurality of scanning lines and signal lines provided on said insulating substrate in a matrix pattern;

pixel electrodes, each of which being provided to areas enclosed by said scanning lines and signal lines, respectively;

switching elements electrically connected to said scanning lines, signal lines, and pixel electrodes, respectively; and

a resistance control element electrically connecting at least two lines selected arbitrarily from each of said scanning lines and signal lines, said resistance control element varying a resistance value between the at least two lines in response to a voltage applied to the resistance control element, the resistance control element having two thin film transistors (TFTs), and an ON resistance of the TFTs controls the resistance value between the at least two lines, wherein said each of said two thin film transistors each have a source electrode of a first TFT electrically connected to and a drain electrode of the other TFT.

2. The active matrix substrate of claim 1, wherein said two thin film transistors are channel-etch type transistors.

3. An active matrix substrate comprising:

an insulating substrate;

a plurality of scanning lines and signal lines provided on said insulating substrate in a matrix pattern;

pixel electrodes, each of which being provided to areas enclosed by said scanning lines and signal lines, respectively;

switching elements electrically connected to said scanning lines, signal lines, and pixel electrodes, respectively; and

a resistance control element electrically connecting at least two lines selected arbitrarily from each of said scanning lines and signal lines, said resistance control element varying a resistance value between the at least two lines in response to a voltage applied to the resistance control element, the resistance control element having two thin film transistors (TFTs), and an ON resistance of the TFTs controls the resistance value between the at least two lines,

wherein said signal lines and pixel electrodes are made of a same conductive film.

4. An active matrix substrate comprising:

an insulating substrate;

a plurality of scanning lines and signal lines provided on said insulating substrate in a matrix pattern;

pixel electrodes arranged in an array in said matrix pattern;

switching elements electrically connected to said scanning lines, signal lines, and pixel electrodes; and

a first set of two parallel thin film transistors (TFTs) electrically connecting at least one pair of said scanning lines or at least one pair of said signal lines, a second set of two parallel TFTs electrically connecting at least one of said scanning lines to at least one of said signal lines, and

said first set of TFTs smoothly varying a resistance value between the at least one pair of said scanning lines or at least one pair of said signal lines in response to a voltage applied across the first set of TFTs wherein an ON resistance of the second set of TFTs controls the resistance value between the at least one pair of said scanning lines or at least one pair of said signal lines,

said second set of TFTs smoothly varying a resistance value between the at least one of said scanning lines and at least one of said signal lines in response to a voltage applied across the second set of TFTs, wherein an ON resistance of the second set of TFTs controls the resistance value between the at least one of said scanning lines and at least one of said signal lines.

5. An active matrix substrate comprising:

an insulating substrate;

a plurality of scanning lines a n d signal lines provided on said insulating substrate in a matrix pattern;

pixel electrodes, each of which being provided to areas enclosed by said scanning lines and signal lines, respectively;

switching elements electrically connected to said scanning lines, signal lines, and pixel electrodes, respectively; and

a resistance control element electrically connecting at least two lines of said scanning lines or at least two lines of said signal lines, said resistance control element varying a resistance value between the at least two lines in response to a voltage applied to the resistance control element, the resistance control element having two thin film transistors (TFTs) each connected to both of said at least two lines, and an ON resistance of the TFTs controls the resistance value between the at least two lines,

wherein said TFTs include a first set of TFTs smoothly varying a resistance value between one pair of said scanning lines or one pair of said signal lines in response to a voltage applied across the first set of TFTs wherein an ON resistance of the second set of TFTs controls the resistance value between the one pair of said scanning lines or at least one pair of said signal line, and

a second set of TFTs smoothly varying a resistance value between one of said scanning lines and one of said signal lines in response to a voltage applied across the second set of TFTs, wherein an ON resistance of the second set of TFTs controls the resistance value between the one of said scanning lines and one of said signal lines.

6. The active matrix substrate of claim 5, wherein said at least two lines connected through said resistance control element are selected from said scanning lines.

7. The active matrix substrate of claim 5, wherein said at least two lines connected through said resistance control element are selected from said signal lines.

8. A liquid crystal display device using the active matrix substrate of claim 5.