Voltage level bus translator and safety interlock system for battery modules

• US 6,411,912 B1
• Filed: 07/09/1999
• Issued: 06/25/2002
• Est. Priority Date: 07/09/1999
• Status: Expired due to Fees

• Current Assignee: Alcatel SA (Nokia Corporation)
• Original Assignee: Alcatel SA (Nokia Corporation)
• Inventors: Sack, Thomas T.
• Primary Examiner(s): Hilten, John S.
• Assistant Examiner(s): Pretlow, Demetrius
• Application Number:
  US09/350,375
• Time in Patent Office: 1,082 Days
• Field of Search: 702/63, 320/118, 320/119, 320/125, 320/112, 320/128, 320/134, 324/427, 324/434, 324/551
• US Class Current: 702/63
• CPC Class Codes: G01R 19/16542 for batteries charge condition monitoring in G01R31/36
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/3835 involving only voltage measurements
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: H02J 7/0013 acting upon several batteries simultaneously or sequentially H02J7/1423 takes precedence
• CPC Class Codes: H02J 7/0047 with monitoring or indicating devices or circuits

Abstract

A serial communication interface including a bus voltage level translator and voltage safety interlock system is disclosed. According to a preferred embodiment of the invention, a voltage level translation interface (VLTI) is used to send Uplink and Downlink serial commands and data to a string of battery modules that result in large offset voltages. Through implementation of the VLTI design according to the various exemplary embodiments of the present invention, the addition of as many modules as required to form the desired battery voltage can be accommodated, while using low cost components. No optical couplers are required or other traditional DC blocking devices such as transformers, capacitors, or special isolation amplifiers in order to accommodate the large offset voltages. This is accomplished by level shifting each bit stream of commands up to the higher potential of the next module in the uplink data stream. Similarly in the downlink data stream, each bit stream is level shifted from the present potential to the lower potential of the next lower module.

Claims

1. A battery monitoring system for monitoring a plurality of batteries comprising:

a plurality of modules connected in series for monitoring a respective one of said plurality of batteries;

a processor for transmitting uplink signals to said plurality of modules and receiving downlink signals from said plurality of modules in order to monitor and control the operation of said batteries associated with said modules;

a serial bus including uplink data lines and downlink data lines for interconnecting said processor and said plurality of modules, wherein each of said modules comprises;

an uplink communication receiver unit for receiving and transmitting said uplink signals from said host command and controller via said uplink data lines and translating a voltage level of said uplink signals to a higher voltage level of a next module in said uplink data stream without using galvanic isolation; and

a downlink communication transmitter unit for receiving and transmitting said downlink signals from said modules to said processor via said downlink data lines and translating a voltage level of said downlink signals to a lower voltage level of a next module in said downlink data stream without using galvanic isolation.

2. The battery monitoring system of claim 1, wherein said modules include a microcontroller, each microcontroller having an address, said microcontroller reading said uplink signals that are addressed to the microcontroller and executing specified functions in response to said uplink signals.

3. The battery monitoring system of claim 2, wherein said microcontrollers generate said downlink signals in response to said uplink signals addressed to said microcontrollers.

4. The battery monitoring system of claim 2, wherein said uplink communications receiver unit comprises a plurality of receivers and said downlink transmitter unit comprises a plurality of transmitters wherein said transmitters and receivers comprise at least one transistor forming an inverting translation input buffer for translating said voltage levels of said uplink and downlink signals.

5. The battery monitoring system of claim 1 further comprising a safety interlock for signaling said processor that one of said modules requires immediate attention due to the occurrence of a specified condition.

6. The battery monitoring system of claim 5, wherein said processor sends a command in response to safety interlock signal addressed to each module to control said module requiring immediate attention in response to said specified condition.

7. The battery monitoring system of claim 5 wherein said specified condition is at least one of an over voltage condition;

and over discharge condition;

or and over temperature condition.

8. A module for use in a battery monitoring system including a plurality of said modules and a processor, said module comprising:

a microcontroller for monitoring at least one battery cell;

a plurality of receivers connected to said microcontroller for receiving and transmitting uplink signals from said processor in an uplink data stream;

a plurality of transmitters connected to said microcontroller for receiving and transmitting downlink signals to said processor in a downlink data stream, wherein

said plurality of receivers and transmitters allow said module to be connected to one of said processor or said plurality of modules, in series, and translate a voltage level of said uplink signals and said downlink signals to a voltage level of a next module in said uplink data stream and said downlink data stream, respectively, without using galvanic isolation.

9. The module of claim 8, wherein said receivers and transmitters comprise at least one transistor forming an inverting translation input buffer for translating said voltage level of said received or transmitted signals.

10. The module of claim 8, wherein said microcontroller monitors said uplink data stream for uplink signals addressed to said microcontroller.

11. The module of claim 8, further comprising a safety interlock for signaling that said module requires immediate control due to the occurrence of a specified condition.

12. The module of claim 11, wherein said specified condition is at least one of an over voltage condition;

and over discharge condition;

or and over temperature condition.

13. A high voltage battery comprising:

a plurality of modules connected in series, each of said modules comprising;

at least one cell;

a plurality of receivers forming a serial communications uplink connected to said modules for receiving uplink signals;

a plurality of transmitters forming a serial communications downlink connected to said modules for transmitting downlink signals, wherein

said receivers and transmitters translate a voltage level of each of said uplink signals and said downlink signals to a voltage level associated with a next module in said uplink data stream and said downlink data stream, respectively, without using galvanic isolation.

14. The high voltage battery of claim 13, wherein each of said modules further comprises a microcontroller for reading said received uplink signals addressed to said modules and transmitting said transmitted downlink signals in response to said addressed signals.

15. The high voltage battery of claim 14, wherein said receivers and transmitters comprise at least one transistor forming an inverting translation input buffer for translating the voltage level of said uplink and downlink signals.

16. The high voltage battery of claim 13 further comprising a safety interlock for signaling that said module requires immediate control due to the occurrence of a specified condition.

17. The high voltage battery of claim 16, wherein said specified condition is at least one of an over voltage condition, an over discharge condition, or an over temperature condition.