Method and apparatus for reducing particle contamination on wafer backside during CVD process

• US 6,413,321 B1
• Filed: 12/07/2000
• Issued: 07/02/2002
• Est. Priority Date: 12/07/2000
• Status: Expired due to Term

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Seamons, Martin, Khalili, Davood, Le, Nam, Madhava, Ameeta, Cappello, Emanuele, Berken, Lloyd, Kim, Bok Hoen, Silvetti, Mario Dave
• Primary Examiner(s): Ghyka, Alexander G.
• Application Number:
  US09/731,601
• Time in Patent Office: 572 Days
• Field of Search: 118/719, 118/725, 438/708, 438/680, 438/758, 438/765
• US Class Current: 118/725
• CPC Class Codes: C23C 16/0209 by heating
• CPC Class Codes: C23C 16/4401 Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
• CPC Class Codes: C23C 16/4404 Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
• CPC Class Codes: C23C 16/4405 Cleaning of reactor or parts inside the reactor by using reactive gases
• CPC Class Codes: C23C 16/4583 the substrate being supported substantially horizontally

Abstract

Backside particle contamination of semiconductor wafers subjected to chemical vapor deposition is significantly reduced by optimizing various process parameters, alone or in combination. A high quality oxide seasoning layer is deposited to improve adhesion and trapping of contaminants remaining after a prior chamber cleaning step. Second, wafer pre-heating reduces thermal stress on the wafer during physical contact between the wafer and heater. Third, the duration of the gas stabilization flow of thermally reactive process gas species prior to CVD reaction is reduced, thereby preventing side products produced during this stabilization flow from affecting the wafer backside. Fourth, the wafer heater is redesigned to minimize physical contact between the heater surface and the wafer backside. Redesign of the wafer heater may include providing only a few, small projections from the top wafer surface, and also may include providing a continuous circumferential rim supporting the edge of the wafer to interfere with the flow of process gases to the wafer backside during processing.

Claims

1. An apparatus comprising:

a pedestal including a heated top surface;

a plurality of projections extending upward from the top surface; and

an elevated rim positioned around a circumference of the top surface, the rim creating a seal with a peripheral edge of a back side of a wafer seated upon the projections, the seal interfering with a flow of process gases to the back side of the wafer.

2. The apparatus of claim 1 further comprising a lift pin moveable from an extended position above the top surface to a retracted position within the pedestal.

3. The apparatus of claim 1 wherein a diameter of the top surface is approximately 300 mm and a number of points of contact between the projections and a back side of a wafer seated on the projections is twenty or less.

4. The apparatus of claim 1 wherein the projections occupy a surface area of 1% or less of a back side of a wafer seated upon the projections.

5. The apparatus of claim 1 further comprising an inclined ridge surrounding the rim, the ridge seating a back side of a wafer lowered by the lift pin onto the projections and the rim.

6. The apparatus of claim 1 further comprising a high quality silicon oxide coating formed over the circular top surface by a flow of nitrogen-containing gas in combination with a flow of silicon-containing gas, such that a flow ratio of the nitrogen containing gas to the silicon-containing gas is greater than 10:

1.