High speed CMOS imager column CDS circuit
First Claim
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1. A CMOS imager having a correlated double sampling unit comprising:
- an image sensor having a plurality of photodetectors arranged in a series of rows and columns;
a row addressing circuit;
a column addressing circuit;
a first sample and hold circuit allocated for each of the columns;
a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns;
a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits;
a linear gain amplifier contained in each of the first sample and hold circuits; and
an enabling circuit that enables the linear gain amplifiers for the column that is currently being readout and the column that is to be readout after the column currently being readout;
wherein the enabling circuit enables the linear gain amplifier for the column to be read next after the column that is currently being read to precharge conductive lines connecting the second sample and hold circuit to the first sample and hold circuit within the column to be read out next.
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Abstract
A correlated double sampling unit within a CMOS imager employs an image sensor having a plurality of photodetectors arranged in a series of rows and columns with a row addressing circuit, a column addressing circuit, a first sample and hold circuit allocated for each of the columns, a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns, and a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits.
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Citations
14 Claims
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1. A CMOS imager having a correlated double sampling unit comprising:
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an image sensor having a plurality of photodetectors arranged in a series of rows and columns;
a row addressing circuit;
a column addressing circuit;
a first sample and hold circuit allocated for each of the columns;
a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns;
a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits;
a linear gain amplifier contained in each of the first sample and hold circuits; and
an enabling circuit that enables the linear gain amplifiers for the column that is currently being readout and the column that is to be readout after the column currently being readout;
wherein the enabling circuit enables the linear gain amplifier for the column to be read next after the column that is currently being read to precharge conductive lines connecting the second sample and hold circuit to the first sample and hold circuit within the column to be read out next. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of making a CMOS imager having a correlated double sampling unit comprising:
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providing a CMOS image sensor having a plurality of photodetectors arranged in a series of rows and columns with a row addressing circuit for addressing the rows, a column addressing circuit for addressing the columns, a first sample and hold circuit allocated for each of the columns and a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns;
additionally providing a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits;
providing a linear gain amplifier contained within each of the first sample and hold circuits; and
providing an enabling circuit that enables the linear gain amplifiers for the column that is currently being readout as well as the column that is to be readout after the column that is currently being readout and providing the enabling circuit such that it enables the linear gain amplifier for the column to be read after the column that is currently being read to precharge conductive lines connecting the second sample and hold circuit to the first sample and hold circuit within the column to be read out next. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification