ATM direct access line system
First Claim
1. A telecommunications system for routing information in an asynchronous transfer mode (ATM) system with ATM cells that contain a virtual path identification/virtual channel identification (VPI/VCI), wherein the information is from a first DS0 in a first T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling and is routed by the ATM system to a second DS0 in a second T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling, wherein the system comprises;
- a first ATM interworking multiplexer that is operational to monitor the robbed bit signaling from the first ESF/SF system, to generate and transmit a message indicating an off-hook state, to receive a message identifying the first DS0 and the VPI/VCI, to convert the information from the first DS0 into ATM cells with the VPI/VCI, to generate an F5 OA&
M cell containing frame alignment information and the VPI/VCI, and to transmit the ATM cells;
a second ATM interworking multiplexer that is operational to receive a message identifying the VPI/VCI and the second DS0, to receive the ATM cells with the VPI/VCI , to convert the ATM cells to information for the second DS0 using the frame alignment information, and to transmit the second DS0 to the second ESF/SF system;
a signaling processor that is operational to receive the message from the first ATM multiplexer, to select the VPI/VCI and the second DS0 in response to the off-hook state, to generate and transmit the message to the first ATM multiplexer identifying the first DS0 and the VPI/VCI, and to generate and transmit the message to the second ATM multiplexer identifying the second DS0 and the VPI/VCI;
a first link from the first ATM multiplexer to the signaling processor operational to transfer the messages;
a second link from the second ATM multiplexer to the signaling processor operational to transfer the message; and
an ATM routing system that is operational to route the ATM cells between the first ATM multiplexer and the second ATM multiplexer based on the VPI/VCI.
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Accused Products
Abstract
The invention is an ATM system to route DS0 traffic from T1 Extended Superframe (ESF)or Superframe (SF) systems that use robbed bit signaling. The invention is able to route the call selecting the ATM VPI/VCI that routes the call within the ATM system. DS0s with robbed bit signaling are transported transparently by the ATM system.
26 Citations
30 Claims
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1. A telecommunications system for routing information in an asynchronous transfer mode (ATM) system with ATM cells that contain a virtual path identification/virtual channel identification (VPI/VCI), wherein the information is from a first DS0 in a first T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling and is routed by the ATM system to a second DS0 in a second T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling, wherein the system comprises;
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a first ATM interworking multiplexer that is operational to monitor the robbed bit signaling from the first ESF/SF system, to generate and transmit a message indicating an off-hook state, to receive a message identifying the first DS0 and the VPI/VCI, to convert the information from the first DS0 into ATM cells with the VPI/VCI, to generate an F5 OA&
M cell containing frame alignment information and the VPI/VCI, and to transmit the ATM cells;
a second ATM interworking multiplexer that is operational to receive a message identifying the VPI/VCI and the second DS0, to receive the ATM cells with the VPI/VCI , to convert the ATM cells to information for the second DS0 using the frame alignment information, and to transmit the second DS0 to the second ESF/SF system;
a signaling processor that is operational to receive the message from the first ATM multiplexer, to select the VPI/VCI and the second DS0 in response to the off-hook state, to generate and transmit the message to the first ATM multiplexer identifying the first DS0 and the VPI/VCI, and to generate and transmit the message to the second ATM multiplexer identifying the second DS0 and the VPI/VCI;
a first link from the first ATM multiplexer to the signaling processor operational to transfer the messages;
a second link from the second ATM multiplexer to the signaling processor operational to transfer the message; and
an ATM routing system that is operational to route the ATM cells between the first ATM multiplexer and the second ATM multiplexer based on the VPI/VCI. - View Dependent Claims (2, 3, 4)
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5. A telecommunications system for routing information in an asynchronous transfer mode (ATM) system with ATM cells that contain a virtual path identification/virtual channel identification (VPI/VCI), wherein the information is from a first DS0 in a first T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling and is routed by the ATM system to a second DS0 in a second T1 Superframe/Extended Superframe (ESF/SF) system that uses robbed bit signaling, wherein the first ESF/SF system includes a first switch that sends a route request message to the telecommunications system, wherein the system comprises;
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a first ATM interworking multiplexer that is operational to receive a message identifying the first DS0 and the VPI/VCI, to convert the information from the first DS0 into ATM cells with the VPI/VCI, to generate an F5 OA&
M cell containing to frame alignment information and the VPI/VCI, and to transmit the ATM cells;
a second ATM interworking multiplexer that is operational to receive a message identifying the VPI/VCI and the second DS0, to receive the ATM cells with the VPI/VCI, to convert the ATM cells to information for the second DS0 using the frame alignment information, and to transmit the second DS0 to the second ESF/SF system;
a signaling processor that is operational to receive the route request message from the first switch, to select the first DS0, the VPI/VCI , and the second DS0 in response to the route request message, to generate and transmit the message to the first ATM multiplexer identifying the first DS0 and the VPI/VCI, and to generate and transmit the message to the second ATM multiplexer identifying the second DS0 and the VPI/VCI;
a first link from the first ATM multiplexer to the signaling processor operational to transfer the message;
a second link from the second ATM multiplexer to the signaling processor operational to transfer the message; and
an ATM routing system that is operational to route the ATM cells between the first ATM multiplexer and the second ATM multiplexer based on the VPI/VCI. - View Dependent Claims (6, 7, 8)
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9. A communications system comprising:
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an interworking multiplexer operational to receive superframe traffic, generate and transmit information messages in response to the superframe traffic, receive control messages indicating identifiers for asynchronous traffic, interwork the superframe traffic with the asynchronous traffic in response to the control messages, and transmit the asynchronous traffic; and
a processor operational to receive the information messages, select the identifiers for the asynchronous traffic in response to the information messages, and generate and transmit the control messages indicating the identifiers. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
the processor is further operational to select connections in response to the information messages and generate and transmit other control messages indicating the connections; and
further comprising;
another interworking multiplexer operational to receive the asynchronous traffic, receive the other control messages indicating the connections, interwork the asynchronous traffic with other superframe traffic in response to the other control messages, and transmit the other superframe traffic.
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17. The communications system of claim 16 wherein the interworking multiplexers are further operational to correct slips.
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18. The communications system of claim 16 wherein the interworking multiplexers are further operational to correct frame alignment synchronization.
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19. The communications system of claim 16 wherein the interworking multiplexers are further operational to handle loss of at least a portion of the asynchronous traffic.
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20. The communications system of claim 16 wherein the interworking multiplexers are further operational to perform glare resolution.
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21. The communications system of claim 16 wherein the other interworking multiplexer is further operational to interwork the asynchronous traffic with the other superframe traffic using frame alignment information in the asynchronous traffic.
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22. The communications system of claim 16 further comprising an asynchronous communications system operational to transfer the asynchronous communications between the interworking multiplexers.
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23. The communications system of claim 16 further comprising a switch operational to receive and process the other superframe traffic.
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24. A method of operating a communications system, the method comprising:
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receiving superframe traffic into an interworking multiplexer;
In the interworking multiplexer, generating and transmitting information messages in response to the superframe traffic;
receiving the information messages into a processor;
in the processor, selecting identifiers for asynchronous traffic in response to the information messages;
in the processor, generating and transmitting control messages indicating the identifiers;
in the interworking multiplexer, receiving the control messages indicating the identifiers;
in the interworking multiplexer, interworking the superframe traffic with asynchronous traffic in response to the control messages; and
transmitting the asynchronous traffic from the interworking multiplexer. - View Dependent Claims (25, 26, 27, 28, 29, 30)
processing the superframe traffic in a switch; and
transmitting the superframe traffic from the switch.
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30. The method of claim 24 further comprising transferring the asynchronous communications from the interworking multiplexer through an asynchronous communications system.
Specification