Termination impedance trimming circuit

• US 6,424,200 B1
• Filed: 06/12/2000
• Issued: 07/23/2002
• Est. Priority Date: 06/12/2000
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Hardy, Brett, McNitt, John
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US09/591,972
• Time in Patent Office: 771 Days
• Field of Search: 322/108, 322/437, 322/427, 322/308, 322/333, 322/331, 322/319, 322/306, 326/30
• US Class Current: 327/308
• CPC Class Codes: G06F 13/4086 Bus impedance matching, e.g. termination
• CPC Class Codes: H04L 25/0278 Arrangements for impedance matching

Abstract

A termination impedance in a semiconductor circuit is trimmed to fall within a desired range by a trimming circuit such that the amount of variation in the termination impedance is less than the variation in the sheet rho (resistivity) of the semiconductor. An external reference resistor causes a reference current to flow in multiple branches of a current mirror circuit. One branch of the current mirror circuit has a resistance less than the reference resistor, another has a resistance approximately equal to the reference resistor, and another has resistance greater than the reference resistor. Variation in the sheet rho results voltage drops across the resistor in variation in the resistor values. A logic circuit detects the variations, and encodes a control signal. The control signal is received by a variable termination circuit that switches parallel resistance branches in or out of the termination impedance circuit such that an effective termination impedance is selected based upon the control signal. The resulting termination impedance is thereby maintained within a higher tolerance range than the variation in the termination impedance that would otherwise result from sheet rho variation. 37 CFR 1.72(b).

Claims

1. An apparatus, comprising:

a semiconductor chip;

a variable termination circuit placed on said chip for providing a termination impedance; and

a trim control circuit for providing a control signal to said variable termination circuit wherein said variable termination circuit provides said termination impedance in response to the control signal, whereby said trim control circuit adjusts for sheet rho resistivity variation on said chip by comparing at least one voltage drop across a reference impedance located on said chip with a voltage drop across an impedance located off said chip by causing a reference current of approximately same value to flow through said impedance located on said chip and said reference impedance located off said chip.

2. An apparatus as claimed in claim 1, said variable termination circuit comprising an array of at least one or more resistance branches and a switch coupled to a corresponding one of each of said at least one or more resistance branches, each switch receiving at least a portion of the control signal such that each at least one or more resistance branches are individually coupled to the termination impedance to provide an effective termination impedance in combination based upon the control signal.

3. An apparatus as claimed in claim 2, said at least one or more resistance branches of said array comprising a first resistor coupled in parallel with said switch and a second resistor coupled in series with said switch.

4. An apparatus as claimed in claim 1, said trim control circuit comprising an array of at least one or more resistors each having a predetermined value such that the control signal is generated based upon a voltage drop across each of said at least one or more resistors caused by a reference current flowing through each of said at least one or more resistors.

5. An apparatus as claimed in claim 4, the control signal being responsive to the voltage drop across each of said at least one or more resistors such that variation in the resistivity of the semiconductor modulates, the control signal to select the selected termination impedance in accordance with the variation in the resistivity of the semiconductor.

6. An apparatus as claimed in claim 4, said array including a series transistor in series with at least one of said at least one or more resistors such that an on resistance variation of said at least one series transistor tracks an on resistance variation of at least one transistor in said variable termination circuit.

7. An apparatus as claimed in claim 1, said first means comprising an array of at least one or more resistors each having a predetermined value such that the control signal is generated based upon a voltage drop across each of said at least one or more resistors caused by a reference current flowing through each of said at least one or more resistors.

8. An apparatus as claimed in claim 7, the control signal being responsive to the voltage drop across each of said at least one or more resistors such that variation in the resistivity of the semiconductor modulates the control signal to select the selected termination impedance in accordance with the variation in the resistivity of the semiconductor.

9. An apparatus as claimed in claim 7, said array including a series transistor in series with at least one of said at least one or more resistors such that an on resistance variation of said at least one series transistor tracks an on resistance variation of at least one transistor in said variable termination circuit.

10. An apparatus, comprising:

a semiconductor chip;

first means for providing a termination impedance; and

second means for providing a control signal to said first means wherein said first means provides said termination impedance in response to the control signal, whereby said second means adjusts for sheet rho resistivity variation on said chip by comparing at least one voltage drop across an impedance located on said chip with a voltage drop across a reference impedance located off said chip by causing a reference current of approximately same value to flow through said impedance located on said chip and said reference impedance located off said chip.

11. An apparatus as claimed in claim 10, said first means comprising an array of at least one or more resistance branches and a switch coupled to a corresponding one of each of said at least one or more resistance branches, each switch receiving at least a portion of the control signal such that each at least one or more resistance branches are individually coupled to the termination impedance to provide an effective termination impedance in combination based upon the control signal.

12. An apparatus as claimed in claim 11, said at least one or more resistance branches of said array comprising a first resistor coupled in parallel with said switch and a second resistor coupled in series with said switch.

13. An apparatus for providing a termination impedance, comprising:

a semiconductor chip;

a current mirror circuit having at least one or more branches for causing a reference current to flow through each of the at least one or more branches;

an impedance element in each of the at least one or more branches through which the reference current is caused to flow during operation of said current mirror;

a logic circuit responsive to a voltage drop across said impedance element in each of the at least one or more branches of said current mirror in comparison to a second voltage drop across a reference impedance located off said chip, said logic circuit providing a control signal in response to a value of said impedance element in each of the at least one or more branches; and

an array of at least one or more termination impedances, said array receiving the control signal such that an effective termination impedance is selectable in response to the control signal.

14. An apparatus as claimed in claim 13, said current mirror providing the reference current from a higher precision resistor having a value independent of the value of said impedance element.

15. An apparatus as claimed in claim 13, said impedance element including a resistance having a value that falls within a first variation range and said effective termination impedance having a value that falls within a second variation range such that the second variation range is tighter than the first variation range.

16. An apparatus as claimed in claim 13, the control signal being encoded by said logic circuit as a digital signal.