Parallel processor

• US 6,424,870 B1
• Filed: 08/07/1998
• Issued: 07/23/2002
• Est. Priority Date: 02/09/1996
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Maeda, Hiromitsu, Hamilton, Patrick
• Primary Examiner(s): PATEL, RAMESH B
• Application Number:
  US09/117,867
• Time in Patent Office: 1,446 Days
• Field of Search: 700/2, 700/4, 700/12, 700/67, 712/20, 712/21, 712/22, 712/203, 712/215, 712/226, 712/229, 707/3, 707/4, 707/5, 707/6, 707/7, 707/102, 707/103, 707/104.1, 707/203, 370/400-404, 709/227, 709/237-238, 714/748, 714/749, 714/4, 710/108-112
• US Class Current: 700/4
• CPC Class Codes: H04L 1/16 in which the return channel carries supervisory signals, e.g. repetition request signals
• CPC Class Codes: H04L 1/1671 the supervisory signal being transmitted together with control information
• CPC Class Codes: H04L 1/1835 Buffer management
• CPC Class Codes: H04L 1/1854 Scheduling and prioritising arrangements
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 9/40 Network security protocols
• CPC Class Codes: Y10S 707/99933 Query processing, i.e. searching
• CPC Class Codes: Y10S 707/99943 Generating database or data structure, e.g. via user interface
• CPC Class Codes: Y10S 707/99944 Object-oriented database structure

Abstract

A parallel processor system has a plurality of nodes interconnected by a network for communication under control of a network interface controller of each node. The network interface controller includes a message reception controller for receiving a message from another node and judging illustratively the status of message reception and the need to return an acknowledge message; an acknowledge generating unit for generating an acknowledge message transmission request based on predetermined information in the message and the reception status when the return of an acknowledge message is judged to be necessary; and a message transmission controller for receiving an acknowledge the message transmission request and generating and returning an acknowledge message correspondingly. At the receiving node, the network interface controller can return an acknowledge message without processor intervention.

Claims

1. A parallel processor comprising at least two nodes and a network for interconnecting said nodes which communicate messages therebetween over said network;

wherein each of said nodes has an interface controller for processing transmission and reception of messages to and from said network, and a processor for sending a message transmission request to said interface controller; and

wherein said interface controller generates and transmits an acknowledge message corresponding to each message received from said network, said acknowledge message including information identifying the message received.

2. A parallel processor according to claim 1, wherein said interface controller includes:

receiving means for receiving a message from said network;

generating means for generating the acknowledge message based on predetermined information included in the received message; and

transmitting means for transmitting the generated acknowledge message to said network.

3. A parallel processor according to claim 2, wherein said generating means includes:

acknowledge requesting means for generating an acknowledge message transmission request based on said predetermined information included in said received message; and

message generating means for generating said acknowledge message in response to said acknowledge message transmission request from said acknowledge requesting means.

4. A parallel processor according to claim 3, wherein said message generating means generates a message in response to a message transmission request from said processor, said message generating means further comprising selecting means for selecting an acknowledge message transmission request from said acknowledge requesting means in preference to a message transmission request from said processor if the two requests are in contention.

5. A parallel processor according to claim 3, wherein said generating means further comprises queuing means for temporarily retaining an acknowledge message transmission request from said acknowledge requesting means if the request cannot be received immediately by said message generating means, said queuing means outputting the retained acknowledge message transmission request to said message generating means when said message generating means becomes subsequently ready to receive the request.

6. A parallel processor according to claim 1, wherein a processor interruption occurs in a transmitting node when the transmitting node receives an acknowledge message.

7. A parallel processor according to claim 1, wherein the processor of a transmitting node determines whether a processor interruption is to occur when the transmitting node receives an acknowledge message.

8. A parallel processor according to claim 1, wherein said interface controller verifies the acknowledge message when the node to which the interface controller belongs receives an acknowledge message.

9. A parallel processor, comprising:

at least two nodes; and

a network for interconnecting said nodes which communicate messages therebetween over said network;

wherein each of said nodes has an interface controller for processing transmission and reception of messages to and from said network, and a processor for sending a message transmission request to said interface controller;

wherein said interface controller generates and transmits an acknowledge message corresponding to each message received from said network, said acknowledge message including information notifying receipt of said received message;

wherein said interface controller includes;

receiving means for receiving a message from said network;

generating means for generating the acknowledge message based on predetermined information included in the received message; and

transmitting means for transmitting the generated acknowledge message to said network; and

wherein said interface controller includes;

receiving means for receiving a message from said network;

generating means for generating the acknowledge message based on predetermined information included in the received message; and

transmitting means for transmitting the generated acknowledge message to said network, wherein the transmitted acknowledge message corresponds to the message received form the network;

wherein said message includes acknowledge control information designating whether an acknowledge message is to be returned in response to said message, said receiving means further comprising;

judging means for judging whether it is necessary to return an acknowledge message by referencing said acknowledge control information included in the received message; and

extracting means used when it is judged necessary to return an acknowledge message, said extracting means thereupon extracting predetermined information from said received message and forwarding the extracted information to said generating means.

10. A parallel processor, comprising:

at least two nodes, and

a network for interconnecting said nodes which communicate messages therebetween over said network;

wherein each of said nodes has an interface controller for processing transmission and reception of messages to and from said network, and a processor for sending a message transmission request to said interface controller;

wherein said interface controller generates and transmits an acknowledge message corresponding to each message received from said network, said acknowledge message including information notifying receipt of said received message;

wherein said interface controller includes;

receiving means for receiving a message from said network;

generating means for generating the acknowledge message based on predetermined information included in the received message; and

transmitting means for transmitting the generated acknowledge message to said network; and

wherein said generating means includes;

acknowledge requesting means for generating an acknowledge message transmission request based on said predetermined information included in said received message;

message generating means for generating said acknowledge message in response to said acknowledge message transmission request from said acknowledge requesting means;

queuing means for temporarily retaining an acknowledge message transmission request from said acknowledge requesting means if the request cannot be received immediately by said message generating means, said queuing means outputting the retained acknowledge message transmission request to said message generating means when said message generating means becomes subsequently ready to receive the request,

first holding means for receiving an acknowledge message transmission request from said acknowledge requesting means and sending the request to said queuing means;

time counting means which starts counting when said queuing means and said first holding means are each filled with a maximum allowable number of acknowledge message transmission requests; and

notifying means for notifying said processor that a predetermined period of time has elapsed on said time counting means at the end of the elapsed period; and

wherein said processor further comprises;

second holding means used upon notification from said notifying means, said second holding means thereupon extracting said acknowledge message transmission request from said first holding means and holding the extracted request temporarily; and

writing means used when said acknowledge requesting means does not send a new acknowledge message transmission request to said first holding means, said writing means thereupon extracting said acknowledge message transmission request form said second holding means and writing the extracted request to said first holding means.

11. A parallel processor comprising a plurality of nodes and a network for interconnecting said nodes which communicate messages therebetween over said network;

wherein each of said nodes has an interface controller for processing transmission and reception of messages to and from said network, and a processor for sending a message transmission request to said interface controller; and

wherein said interface controller includes;

a reception controller for receiving messages from said network;

a transmission controller for generating a message in response to a message transmission request and transmitting the generated message to said network; and

an acknowledge generating unit for generating an acknowledge message transmission request including information, identifying the message received by the reception controller from predetermined information included in the message received by said reception controller, said acknowledge generating unit further sending the generated acknowledge message transmission request to said transmission controller, wherein the message transmitted by the transmission controller corresponds to the generated acknowledge message transmission request.

12. A parallel processor according to claim 11, wherein said transmission controller further comprises selecting means for selecting an acknowledge message transmission request from said acknowledge generating unit in preference to a message transmission request from said processor if the two requests are in contention.

13. A parallel processor according to claim 12, wherein said message includes acknowledge control information designating whether an acknowledge message is to be returned in response to said message, said reception controller further comprising:

judging means for judging whether it is necessary to return an acknowledge message by referencing said acknowledge control information included in the received message; and

extracting means used when it is judged necessary to return an acknowledge message, said extracting means thereupon extracting predetermined information from said received message and forwarding the extracted information to said acknowledge generating unit.

14. A parallel processor according to claim 11, wherein said interface controller further comprises an acknowledge queue for temporarily retaining an acknowledge message transmission request from said acknowledge generating unit if the request cannot be received immediately by said transmission controller, said acknowledge queue outputting the retained acknowledge message transmission request to said transmission controller when said transmission controller becomes subsequently ready to receive the request.

15. A parallel processor according to claim 14, wherein said interface controller further comprises:

an acknowledge register for receiving an acknowledge message transmission request from said acknowledge generating unit and sending the request to said acknowledge queue;

a timer which starts counting when said acknowledge queue and said acknowledge register are each filled with a maximum allowable number of acknowledge message transmission requests; and

notifying means for notifying said processor that a predetermined period of time has elapsed on said timer at the end of the elapsed period; and

wherein said processor further comprises;

holding means used upon notification from said notifying means, said holding means thereupon extracting said acknowledge message transmission request from said acknowledge register and holding the extracted request temporarily; and

writing means used when said acknowledge generating unit does not send a new acknowledge message transmission request to said acknowledge queue, said writing means thereupon extracting said acknowledge message transmission request from said holding means and writing the extracted request to said acknowledge register.

16. A parallel processor according to claim 11, wherein a processor interruption occurs in a transmitting node when the transmitting node receives an acknowledge message.

17. A parallel processor according to claim 11, wherein the processor of a transmitting node determines whether a processor interruption is to occur when the transmitting node receives an acknowledge message.

18. A parallel processor according to claim 11, wherein said interface controller verifies the message corresponding to the acknowledge message transmission request when the node to which the interface controller belongs receives the message.

19. A message communication method for use with a parallel processor comprising a plurality of nodes and a network for interconnecting said nodes, each of said nodes including an interface controller and a processor, said interface controller processing transmission and reception of messages to and from said network, said processor sending a message transmission request to said interface controller so that messages requested by said processor will be exchanged between nodes over said network, said message communication method comprising the steps of:

allowing said interface controller of a transmitting node, in response to a request from said processor, to transmit a message to at least one receiving node;

causing said interface controller of said receiving node to receive said message over said network;

causing said interface controller of said receiving node to generate an acknowledge message including information notifying receipt with regard to the received message; and

causing said interface controller of said receiving node to transmit a message, corresponding to said acknowledge message, to said transmitting node.

20. A message communication method for use with a parallel processor according to claim 19, further comprising the step of causing said interface controller of said receiving node to notify said processor of the receipt of said message either concurrently with generation and returning of said acknowledge message or after the return of said acknowledge message.

21. A message communication method for use with a parallel processor according to claim 19, further comprising the steps of:

if a message transmission request is received from said processor upon generation of said acknowledge message, causing said interface controller of said receiving node to generate said acknowledge message in preference to the message requested by said processor and to return the generated acknowledge message to said transmitting node; and

causing said interface controller thereafter to generate said message in response to said message transmission request from said processor and to transmit the generated message.

22. A message communication method for use with a parallel processor according to claim 19, further comprising the steps of:

causing said interface controller of said transmitting node to include into a message, acknowledge control information designating whether said acknowledge message is to be returned, before transmitting said message; and

causing said interface controller of said receiving node to reference said acknowledge control information included in said message and to return said acknowledge message if so designated by said acknowledge control information.

23. A message communication method for use with a parallel processor according to claim 22, further comprising the steps of:

causing said interface controller of said transmitting node to include into said message, acknowledge information designating whether said processor is to be notified of the receipt of said acknowledge message from said receiving node, before transmitting said message;

causing said interface controller of said receiving node to extract said acknowledge control information from said message and to include the extracted acknowledge control information into said acknowledge message before returning said acknowledge message; and

causing said interface controller of said transmitting node to receive said acknowledge message, reference said acknowledge control message included in the received acknowledge message, and carry out notification to said processor in accordance with said acknowledge control message.

24. A message communication method for use with a parallel processor according to claim 23, further comprising the steps of:

causing said interface-controller of either said transmitting node or said receiving node to include into either said message or said acknowledge message, message type information indicating the type of the message to be transmitted, before transmitting either said message or said acknowledge message; and

causing said interface controller of either transmitting node or said receiving node having received either of the two messages to reference said message type information included in the received message in order to recognize the type of the message in question.

25. A message communication method for use with a parallel processor according to claim 23, further comprising the steps of:

causing said interface controller of said receiving node to generate acknowledge status information indicating the type of said acknowledge message reflecting reception status of said message and to include the generated acknowledge status information into said acknowledge message before returning said acknowledge message; and

causing said processor notified of the receipt of said acknowledge message to reference said acknowledge status information included therein to recognize the type of said acknowledge message.

26. A message communication method for use with a parallel processor according to claim 19, further comprising the steps of:

allowing each of said nodes to have a first and a second message receiving area for storing received messages;

causing said interface controller of said receiving node to store said message into said first message receiving area concurrently with generation and returning of said acknowledge message;

generate a first acknowledge message-including information indicating that said message has been stored into said first message receiving area;

return said first acknowledge message to said transmitting node; and

notify said processor that said message has been received; and

causing said processor to read said message from said first message receiving area;

store the retrieved message into said second message receiving area;

generate a second acknowledge message including information indicating that said message has been stored in said second message receiving area; and

return said second acknowledge message to said transmitting node.

27. A message communication method for use with a parallel processor according to claim 19, further comprising the step of causing a processor interruption in a transmitting node when the transmitting node receives an acknowledge message.

28. A message communication method for use with a parallel processor according to claim 19, further comprising the step of determining whether a processor interruption is to occur when a transmitting node receives an acknowledge message.

29. A message communication method for use with a parallel processor according to claim 19, further comprising the step of causing the interface controller to verify the acknowledge message when the node to which the interface controller belongs receives an acknowledge message.