Coding and storing method for fuzzy logic rules and circuit architecture for processing such rules

• US 6,424,958 B1
• Filed: 12/22/1997
• Issued: 07/23/2002
• Est. Priority Date: 12/27/1996
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Inventors: Di Bella, Dario, Pappalardo, Francesco, Giacalone, Biagio, Arcidiacono, Liliana
• Primary Examiner(s): Davis, George B.
• Application Number:
  US08/995,671
• Time in Patent Office: 1,674 Days
• Field of Search: 706/8, 706/52
• US Class Current: 706/8
• CPC Class Codes: G06N 7/04 Physical realisation

Abstract

The invention relates to a method of coding and storing fuzzy logic rules, and to a circuit architecture for processing such rules. The method provides for at least one inference rule of the IF/THEN type, having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part, to be dismembered and stored into memory words to allow subsequent processing using logic operators of the AND/OR/NOT type. The coding of rules and variables is effected sequentially. Thus, the occupation of memory locations can be minimized. Specifically, the rules are coded through a multi-word description, such that the number of words coding each rule is a varying number dependent on the number of antecedent parts in the rule.

Claims

1. A method of storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered into separate antecedent parts and consequent parts, each part stored in an individual memory word to allow for subsequent processing using logic operators of the AND/OR/NOT type, wherein the memory words of an inference rule are stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule, and the at least one inference rule is stored sequentially.

2. A method of coding and storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered into separate antecedent parts and consequent parts, each part being stored in an individual memory word to allow for subsequent processing using logic operators of the AND/OR/NOT type, wherein the variables are coded for serial processing and stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule, wherein each rule is coded with:

a first type of memory word composition for each antecedent part;

a second type of memory word composition for each consequent part; and

a third type of memory word composition if the set of fuzzy logic rules relate to more than one output variable and a coded inference operation is the last to carry weight in the computation of a fuzzy output.

3. A method according to claim 2, wherein each first type of memory word is composed of a plurality of fields.

4. A method according to claim 3, wherein said plurality of fields include a first field defining a rule structure, a second field representing a type of the fuzzy operator, a third field indicating an input variable whose value is to intersect a membership function indicated in a following fourth field such that an alpha weight can be determined for a antecedent part being processed.

5. A method according to claim 4, wherein first and second fields each occupy a single bit of said first type of memory word.

6. A method according to claim 4, wherein the third field comprises m bits, m is a being the same as the number of input variables.

7. A method according to claim 4, wherein the fourth field comprises n bits which correspond to a number of membership functions definable for each input variable.

8. A method according to claim 4, wherein, in the memory word related to a last antecedent part of the rule, the second field takes a different meaning to indicate the presence or absence of further rules determining the fuzzy output, when the rule being processed is a last or only rule.

9. A method according to claim 2, wherein said first type of memory word further comprises a, single-bit field representing a negating NOT operator in fuzzy logics.

10. A circuit architecture for coding, processing and storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered into separate antecedent parts and consequent parts, each part stored in an individual memory word to allow subsequent processing using logic operators of AND/OR/NOT type, said architecture comprising a fuzzy processor connected bi-directionally to a memory where the dismembered parts are coded for serial processing and stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule and the subsequent processing of the memory words in a rule and the fuzzy logic rules are processed serially and sequentially in the order with which they are stored.

11. An architecture according to claim 10, further comprising a processing circuit portion for computing an alpha weight of an antecedent part of a fuzzy rule and an evaluation circuit block for computing and outputting an omega weight related to the antecedent part of the fuzzy rules, and a circuit portion provided downstream from the evaluation circuit block to process the various omega weights output by the evaluation circuit block, and outputting a fuzzy output, said circuit portion processing said omega weights using a Centroid Method.

12. An architecture according to claim 11, wherein said evaluation circuit block includes registers adapted to contain values of partial operations of fuzzy inference.

13. A circuit architecture for coding, processing and storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered into separate antecedent parts and consequent parts, each part stored in an individual memory word to allow subsequent processing using logic operators of the AND/OR/NOT type, said architecture comprising a fuzzy processor connected bi-directionally to a memory where the memory words of the inference rule being stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule and a coding of the rules and the variables is effected sequentially, wherein each rule is coded in said memory, each rule having:

a first type of memory word composition for each antecedent part; and

a second type of memory word composition for each consequent part;

and said architecture further comprising a processing circuit that receives serially and sequentially in the order with which the parts are stored said individual memory words having said first composition and said individual memory words having said second composition to provide a fuzzy output.

14. A circuit architecture for coding and storing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered into separate antecedent parts and consequent parts, each part stored in an individual memory word to allow subsequent processing using logic operators of the AND/OR/NOT type, said architecture comprising a fuzzy processor connected bi-directionally to a memory where the memory words of the inference rule are stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule, wherein each memory word for each antecedent part is divided into fields, each field including a first field defining a rule structure, a second field representing a logic operator, a third field indicating an input variable whose value is to intersect a membership function indicated in a following fourth field such that an alpha weight can be determined for the antecedent part being processed.

15. A method of coding and processing a fuzzy logic rule, said fuzzy logic rule comprising at least one antecedent part and at least one consequent part, the method comprising the steps of:

storing each of said at least one antecedent part in a separate first memory byte;

storing each of said at least one consequent part in a separate second memory byte; and

serially processing each of said at least one antecedent part and each of said at least one consequent part.

16. The method of claim 15, further comprising dividing each of said first memory bytes into a plurality of fields.

17. The method of claim 16, further comprising:

storing, in a first field of each of said first memory bytes, information which indicates a priority of order followed in said processing step;

storing, in a second field of each of said first memory bytes, information which indicates a logic operation to be performed;

storing, in a third field of each of said first memory bytes, an input variable on which said logic operation is performed; and

storing, in a fourth field of each of said first memory bytes, a membership function which determines a weighting factor for each antecedent part.

18. The method of claim 17, further comprising storing, in a fifth field of each of said first memory bytes, information which indicates whether a NOT operator is to be applied to the input variable stored in the third field of each memory byte.

19. The method of claim 18, further comprising storing, in said second field of a final antecedent part of said fuzzy logic rule, information which indicates the presence or absence of further rules to be processed in said processing step.

20. A device for storing and processing fuzzy logic rules, each of said fuzzy logic rules comprising at least one antecedent, each antecedent having at least one antecedent part and a corresponding consequent, Z_i, each consequent Z_i having at least one consequent part, each of said at least one antecedent part and said at least one consequent part comprising a separate memory word and stored sequentially in an order corresponding to a structure of the fuzzy logic rule, the device comprising:

memory means for storing a plurality of said memory words;

alpha value computing means for computing an alpha value for each of said at least one antecedent parts;

omega value computing means for receiving said alpha value from said alpha value computing means and computing an omega value, ω

_i, for each antecedent of each fuzzy logic rule;

processing means for receiving said omega value ω

_i and said consequent Z_i and outputting a fuzzy output after processing said omega value and consequent according to the equation;

$\frac{\mathrm{\Sigma <br><br>}<br><br>\text{\hspace{1em}<br><br>}<br><br>{\mathrm{\omega <br><br>}}_i*Z_i}{\mathrm{\Sigma <br><br>}<br><br>\text{\hspace{1em}<br><br>}<br><br>{\mathrm{\omega <br><br>}}_i}<br><br>\text{\hspace{1em}<br><br>};<br><br>\text{\hspace{1em}<br><br>}<br><br>\mathrm{and}$

 

wherein ω

_i is a weight of the I-th fuzzy logic rule;

control means for supplying said memory words from said memory means to said alpha value computing means, for supplying said consequent Z_i from said memory means to said processing means and for controlling the operation of said alpha value computing means, said omega value computing means and said processing means.

21. A method of storing and processing fuzzy logic rules, wherein at least one inference rule of the IF/THEN type having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part are dismembered and stored into a plurality of memory words, a memory word for each antecedent part and another memory word for each consequent part, the plurality of memory words stored sequentially in an order corresponding to a structure of the IF/THEN type inference rule, processing using logic operators of the AND/OR/NOT type, and reconstructing the fuzzy logic rules by processing in a sequential manner one memory word sequentially followed by said another memory word.