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Fabrication of a high density long channel DRAM gate with or without a grooved gate

  • US 6,426,175 B2
  • Filed: 02/22/1999
  • Issued: 07/30/2002
  • Est. Priority Date: 02/22/1999
  • Status: Expired due to Fees
First Claim
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1. A method for forming a transistor in a memory device, the method comprising the steps of:

  • a) forming a gate stack layer on a substrate;

    b) patterning the gate stack layer to simultaneously define a gate and two spaces from a single image, with the gate situated between the two spaces to form a space/line/space combination, the gate and one of the two spaces having a total width that is approximately 2.0 F, wherein the gate has a width that is at least twice a width of the one space; and

    c) forming first and second source/drain regions in the substrate on opposite sides of the gate.

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