Memory, interface system and method for mapping logical block numbers to physical sector numbers in a flash memory, using a master index table and a table of physical sector numbers

• US 6,427,186 B1
• Filed: 03/30/1999
• Issued: 07/30/2002
• Est. Priority Date: 03/30/1999
• Status: Expired due to Term

• Current Assignee: Greenliant LLC
• Original Assignee: Silicon Storage Technology Incorporated (Microchip Technology Incorporated)
• Inventors: Xing, Dongsheng, Lin, Frank (Fong-Long)
• Primary Examiner(s): Gossage, Glenn
• Application Number:
  US09/281,630
• Time in Patent Office: 1,218 Days
• Field of Search: 711/103, 711/5, 711/202, 711/209, 711/203, 711/205, 711/206, 711/207, 714/5, 714/6, 714/7, 714/8
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 16/105 Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written

Abstract

A memory system, an interface system for accessing a physical sector on an electrically erasable media based upon a logical block number, and a method for mapping a logical block number to a physical sector on an electrically erasable media are disclosed. The erasable media has an erase block size larger than a write block size. The interface system interfaces a host processor to an electrically-erasable memory, such as a flash media. The host processor requests access to the memory based on a logical block number. The interface system uses a first portion of the logical block number to determine from a master index table a physical sector number of a table of physical sector numbers corresponding to the logical block number. The interface system uses a second portion of the logical block number to determine from the table of physical sector numbers the physical sector number on the media corresponding to the logical block number. The host processor is provided access to the physical sector having the physical sector number corresponding to the logical block number. A logical block number may be remapped to a physical sector that has been completely erased by updating the table of physical sector numbers corresponding to the logical block number. A plurality of physical sectors, which are marked as discarded are erased simultaneously.

Claims

1. A method of writing new data to replace old data in a location defined by a logical block number, in an electrically-erasable media having a plurality of physical sectors, each having a plurality of non-volatile memory cells, with each physical sector having a location defined by an associated physical sector number, with said new data replacing said old data from a first physical sector number, said method comprising:

determining from a master index table, a second physical sector number, different from said first physical sector number, corresponding to said logical block number, the second physical sector containing a table of other physical sector numbers including said first physical sector number;

replacing said first physical sector number in said second physical sector by a third physical sector number, said third physical sector number different from said first physical sector number and different from said second physical sector number;

the third physical sector containing erased memory cells;

writing said new data to said erased memory cells of said third physical sector;

marking the first physical sector as being ready for erasure; and

erasing substantially simultaneously a plurality of physical sectors, including said first physical sector, each of which has been marked as being ready for erasure.

2. The method of claim 1 further comprising:

building the master index table, including;

inspecting a status portion of each physical sector to determine whether a physical sector contains a table of physical sector numbers;

including a physical sector number of a physical sector in the master index table in the event of an affirmative determination.

3. The method of claim 1 wherein the step of determining the second physical sector number includes accessing the contents of said second physical sector number.

4. The method of claim 3, wherein the step of accessing the contents of said second physical sector number includes:

determining whether a coherent copy of said table of other physical sector numbers including said first physical sector number is in a cache; and

if it is determined that a coherent copy of said table of other physical sector numbers including said first physical sector number is in a cache, accessing said table from the cache, and otherwise, accessing the contents of said second physical sector from the electrically-erasable media.

5. A memory system for use by a host processor, comprising:

an electrically erasable memory having a plurality of physical sectors, each having a plurality of non-volatile memory cells, said memory cells required to be erased before being written, with each physical sector having a location defined by an associated physical sector number; and

a control circuit for receiving data to be written into a location defined by said logical block number, said control circuit for mapping said logical block number to a first physical sector number with the mapping stored in a table of physical sector numbers in a second physical sector of said electrically erasable memory, and for erasing substantially simultaneously a plurality of physical sectors from said electrically erasable memory marked for erasure, wherein said control circuit comprises;

a buffer; and

a microcontroller for retrieving said table of physical sector numbers from said

second physical sector of said electrically erasable memory and storing said table

in said buffer;

wherein each physical sector of said electrically erasable memory has a status field associated therewith for indicating whether the physical sector has valid data stored therein, has data to be erased, is erased, or contains a table of physical sector numbers for mapping purposes.

6. The memory system of claim 5, wherein the control circuit selects the first physical sector having a status field indicating the sector is erased for storing data to be written into a location defined by said logical block number.

7. The memory system of claim 6, wherein in the event said data to be written into said location defined by the host processor is for replacing data at said location, said control circuit further marks the status field of a physical sector having the data to be replaced as having data to be erased.

8. An interface system to access a physical sector on an electrically erasable memory based on a logical block number, said electrically erasable memory having a plurality of physical sectors, each having a plurality of non-volatile memory cells, said memory cells required to be erased before being written, with each physical sector having a location defined by an associated physical sector number said interface system comprising:

a buffer for storing a table mapping a plurality of logical block numbers to a plurality of first physical sector numbers, and

a control circuit for receiving data to be written into said logical block number, said control circuit for mapping said logical block number to a first physical sector number based upon said table, and to erase substantially simultaneously a plurality of physical sectors from said electrically erasable memory marked for erasure;

wherein each physical sector of said electrically erasable memory has a status field associated therewith for indicating whether the physical sector has valid data stored therein, has data to be erased, is erased, or contains a table of physical sector numbers for mapping purpose.

9. The interface system of claim 8 wherein the control circuit selects the first physical sector having a status field indicating the sector is erased for storing data to be written into a location defined by said logical block number.

10. The interface system of claim 9, wherein in the event said data to be written into said location defined by said logical block number is for replacing data at said location, said control circuit further marks the status field of a physical sector having the data to be replaced as having data to be erased.